Lines Matching defs:n
50 #define VPR_PRIORITY_GET(n) (((n) >> 16) & 0x000f) argument
51 #define VPR_PRIORITY_MAKE(n) (((n) & 0x000f) << 16) argument
53 #define VPR_VECTOR_GET(n) (((n) >> 0) & 0xffff) argument
54 #define VPR_VECTOR_MAKE(n) (((n) & 0xffff) << 0) argument
63 #define DR_CI(n) (1 << (30 - (n))) /* critical intr cpu n */ argument
64 #define DR_P(n) (1 << (n)) /* intr cpu n */ argument
68 #define BRR1_IPID(n) (((n) >> 16) & 0xffff) argument
69 #define BRR1_IPMJ(n) (((n) >> 8) & 0x00ff) argument
70 #define BRR1_IPMN(n) (((n) >> 0) & 0x00ff) argument
72 #define BRR2_IPINT0(n) (((n) >> 16) & 0xff) argument
73 #define BRR2_IPCFG0(n) (((n) >> 0) & 0xff) argument
75 #define OPENPIC_IPIDR(n) (0x0040 + 0x10 * (n)) argument
83 #define FRR_NIRQ_GET(n) (((n) >> 16) & 0x7ff) /* intr sources - 1 */ argument
84 #define FRR_NCPU_GET(n) (((n) >> 8) & 0x01f) /* cpus - 1 */ argument
85 #define FRR_VID_GET(n) (((n) >> 0) & 0x0ff) /* version id */ argument
92 #define OPENPIC_IPIVPR(n) (0x10a0 + 0x10 * (n)) argument
95 #define SVR_VECTOR_GET(n) (((n) >> 0) & 0xffff) argument
96 #define SVR_VECTOR_MAKE(n) (((n) & 0xffff) << 0) argument
99 #define OPENPIC_GTCCR(cpu, n) (0x1100 + 0x40 * (n) + 0x1000 * (cpu)) argument
102 #define OPENPIC_GTBCR(cpu, n) (0x1110 + 0x40 * (n) + 0x1000 * (cpu)) argument
105 #define OPENPIC_GTVPR(cpu, n) (0x1120 + 0x40 * (n) + 0x1000 * (cpu)) argument
106 #define OPENPIC_GTDR(cpu, n) (0x1130 + 0x40 * (n) + 0x1000 * (cpu)) argument
108 #define TCR_ROVR(n) (1 << (24 + (n))) /* timer n rollover */ argument
126 #define ERQSR_A(n) (1 << (31 - (n))) /* intr <n> active */ argument
128 #define IRSR0_MSI_A(n) (1 << (31 - (n))) /* msg sig intr <n> */ argument
129 #define IRSR0_MSG_A(n) (1 << (20 - ((n) ^ 4))) /* shared msg intr */ argument
130 #define IRSR0_EXT_A(n) (1 << (11 - (n))) /* ext int <n> active */ argument
132 #define IRQSR1_A(n) (1 << (31 - ((n) - 0))) /* intr <n> active */ argument
134 #define IRQSR2_A(n) (1 << (31 - ((n) - 32))) /* intr <n> active */ argument
137 #define CISR1_A(n) (1 << (31 - ((n) - 0))) /* intr <n> active */ argument
139 #define CISR2_A(n) (1 << (31 - ((n) - 32))) /* intr <n> active */ argument
144 #define OPENPIC_PMMR0(n) (0x1350 + 0x20 * (n)) argument
145 #define PMMR0_MShl(n) (1 << (31 - (n))) argument
146 #define PMMR0_IPI(n) (1 << (24 - (n))) argument
147 #define PMMR0_TIMER(n) (1 << (20 - (n))) argument
148 #define PMMR0_MSG(n) (1 << (16 - ((n) & 7))) argument
149 #define PMMR0_EXT(n) (1 << (12 - (n))) argument
150 #define OPENPIC_PMMR1(n) (0x1360 + 0x20 * (n)) argument
151 #define PMMR1_INT(n) (1 << (31 - ((n) - 0))) /* intr <n> active */ argument
152 #define OPENPIC_PMMR2(n) (0x1364 + 0x20 * (n)) argument
153 #define PMMR2_INT(n) (1 << (31 - ((n) - 32))) /* intr <n> active */ argument
158 #define OPENPIC_MSGR(cpu, n) (0x1400 + 0x1000 * (cpu) + 0x10 * (n)) argument
160 #define MER_MSG(n) (1 << (n)) argument
162 #define MSR_MSG(n) (1 << (n)) argument
164 #define OPENPIC_MSIR(n) (0x1600 + 0x10 * (n)) argument
166 #define MSIR_SR(n) (1 << (n)) argument
173 #define OPENPIC_EIVPR(n) (0x10000 + 0x20 * (n)) argument
174 #define OPENPIC_EIDR(n) (0x10010 + 0x20 * (n)) argument
175 #define OPENPIC_IIVPR(n) (0x10200 + 0x20 * (n)) argument
176 #define OPENPIC_IIDR(n) (0x10210 + 0x20 * (n)) argument
177 #define OPENPIC_MIVPR(n) (0x11600 + 0x20 * (n)) argument
178 #define OPENPIC_MIDR(n) (0x11610 + 0x20 * (n)) argument
179 #define OPENPIC_MSIVPR(n) (0x11c00 + 0x20 * (n)) argument
180 #define OPENPIC_MSIDR(n) (0x11c10 + 0x20 * (n)) argument
353 #define OPENPIC_IPIDRn(cpu, n) (0x20040 + 0x1000 * (cpu) + 0x10 * (n)) argument