Lines Matching defs:dma_dev
57 struct dma_dev { /* format of dma device registers */ struct
58 volatile uint32_t dd_csr; /* control & status register */
59 char dd_pad[0x3fec]; /* csr not contiguous with next */
60 char *dd_saved_next; /* saved pointers for HW restart */
61 char *dd_saved_limit;
62 char *dd_saved_start;
63 char *dd_saved_stop;
64 char *dd_next; /* next word to dma */
65 char *dd_limit; /* dma complete when next == limit */
66 char *dd_start; /* start of 2nd buf to dma */
67 char *dd_stop; /* end of 2nd buf to dma */
68 char dd_pad2[0x1f0];
69 char *dd_next_initbuf; /* next register that inits dma buffering */