Lines Matching defs:regs
128 #define SBIC_WAIT(regs, until, timeo) sbicwait(regs, until, timeo, __LINE__)
212 sbic_regmap_p regs;
222 regs = dev->sc_sbicp;
230 GET_SBIC_asr(regs, asr);
249 SBIC_TC_GET(regs, count);
265 SBIC_TC_PUT(regs, 0);
266 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
717 sbicwait(sbic_regmap_p regs, u_char until, int timeo, int line)
724 GET_SBIC_asr(regs, val);
730 GET_SBIC_csr(regs, csr);
741 GET_SBIC_asr(regs, val);
750 sbic_regmap_p regs = dev->sc_sbicp;
753 GET_SBIC_asr(regs, asr);
754 GET_SBIC_csr(regs, csr);
769 GET_SBIC_data(regs, asr);
772 GET_SBIC_asr(regs, asr);
775 SET_SBIC_data(regs, asr);
776 GET_SBIC_asr(regs, asr);
779 WAIT_CIP(regs);
783 SET_SBIC_cmd(regs, SBIC_CMD_ABORT);
784 WAIT_CIP(regs);
786 GET_SBIC_asr(regs, asr);
801 SET_SBIC_cmd(regs, SBIC_CMD_DISC);
804 SBIC_WAIT (regs, SBIC_ASR_INT, 0);
805 GET_SBIC_asr(regs, asr);
806 GET_SBIC_csr (regs, csr);
878 sbic_regmap_p regs = dev->sc_sbicp;
893 SET_SBIC_myid(regs, my_id);
898 SET_SBIC_cmd(regs, SBIC_CMD_RESET);
901 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
902 GET_SBIC_csr(regs, csr); /* clears interrupt also */
908 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
914 SET_SBIC_rselid(regs, SBIC_RID_ER);
919 SET_SBIC_syn(regs, 0);
955 sbic_regmap_p regs = dev->sc_sbicp;
969 SET_SBIC_selid(regs, target);
970 SET_SBIC_timeo(regs, SBIC_TIMEOUT(250, dev->sc_clkfreq));
972 GET_SBIC_asr(regs, asr);
982 SET_SBIC_cmd(regs, SBIC_CMD_SEL_ATN);
988 WAIT_CIP(regs);
992 asr = SBIC_WAIT(regs, SBIC_ASR_INT | SBIC_ASR_LCI, 0);
1002 GET_SBIC_csr (regs, csr);
1045 GET_SBIC_selid(regs, id);
1056 SET_SBIC_rselid (regs, 0);
1058 SET_SBIC_rselid (regs, SBIC_RID_ER);
1094 SEND_BYTE (regs, MSG_IDENTIFY | lun);
1096 SEND_BYTE (regs, MSG_IDENTIFY_DR | lun);
1119 sbicxfout(regs, 6, dev->sc_msg);
1132 SBIC_WAIT(regs, SBIC_ASR_INT , 0);
1133 GET_SBIC_csr(regs, csr);
1146 SET_SBIC_syn(regs, SBIC_SYN(dev->sc_sync[target].offset,
1154 SET_SBIC_syn(regs, SBIC_SYN(0, sbic_min_period));
1175 sbicxfout(sbic_regmap_p regs, int len, void *bp)
1190 WAIT_CIP (regs);
1192 SBIC_TC_PUT (regs, 0);
1193 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
1194 SBIC_TC_PUT (regs, (unsigned)len);
1195 SET_SBIC_cmd (regs, SBIC_CMD_XFER_INFO);
1202 GET_SBIC_asr(regs, asr);
1206 SET_SBIC_data (regs, *buf);
1210 SET_SBIC_data (regs, 0);
1232 sbicxfin(sbic_regmap_p regs, int len, void *bp)
1241 WAIT_CIP(regs);
1243 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
1244 SBIC_TC_PUT(regs, (unsigned int)len);
1245 SET_SBIC_cmd (regs, SBIC_CMD_XFER_INFO);
1252 GET_SBIC_asr(regs, asr);
1256 GET_SBIC_data (regs, *buf);
1261 GET_SBIC_data (regs, foo);
1273 SBIC_TC_PUT (regs, 0);
1297 sbic_regmap_p regs = dev->sc_sbicp;
1322 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
1333 GET_SBIC_asr(regs, asr);
1346 GET_SBIC_csr(regs, csr);
1363 GET_SBIC_cmd_phase(regs, phase);
1366 GET_SBIC_tlun(regs, dev->sc_stat[0]);
1384 if (sbicxfout(regs, clen, cbuf))
1404 SET_SBIC_cmd_phase(regs, 0x46);
1405 SET_SBIC_cmd(regs, SBIC_CMD_SEL_ATN_XFER);
1417 GET_SBIC_asr(regs, asr);
1438 GET_SBIC_data(regs, i);
1439 GET_SBIC_asr(regs, asr);
1443 SET_SBIC_data(regs, i);
1446 GET_SBIC_asr(regs, asr);
1456 SBIC_WAIT(regs, SBIC_ASR_INT, sbic_cmd_wait);
1466 GET_SBIC_csr(regs, csr);
1488 sbic_regmap_p regs = dev->sc_sbicp;
1498 SBIC_TC_PUT(regs, 0);
1499 SET_SBIC_cmd_phase(regs, 0x46);
1500 SET_SBIC_cmd(regs, SBIC_CMD_SEL_ATN_XFER);
1504 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
1505 GET_SBIC_csr(regs, csr);
1513 GET_SBIC_cmd_phase (regs, phase);
1517 GET_SBIC_tlun(regs, dev->sc_stat[0]);
1533 sbic_regmap_p regs = dev->sc_sbicp;
1617 GET_SBIC_asr(regs, asr);
1628 WAIT_CIP(regs);
1631 GET_SBIC_asr(regs, asr);
1638 GET_SBIC_csr(regs, csr);
1661 sbic_regmap_p regs = dev->sc_sbicp;
1668 GET_SBIC_asr (regs, asr);
1672 GET_SBIC_csr(regs, csr);
1680 WAIT_CIP(regs);
1683 GET_SBIC_asr(regs, asr);
1689 GET_SBIC_csr(regs, csr);
1707 sbic_regmap_p regs = dev->sc_sbicp;
1714 SBIC_WAIT(regs, SBIC_ASR_INT, sbic_cmd_wait);
1717 GET_SBIC_asr (regs, asr);
1720 GET_SBIC_csr(regs, csr);
1729 WAIT_CIP(regs);
1730 GET_SBIC_asr(regs, asr);
1749 GET_SBIC_data(regs, z);
1750 GET_SBIC_asr(regs, asr);
1753 SET_SBIC_data(regs, z);
1756 GET_SBIC_asr(regs, asr);
1762 SBIC_WAIT(regs, SBIC_ASR_INT, sbic_cmd_wait);
1775 sbic_regmap_p regs = dev->sc_sbicp;
1784 GET_SBIC_asr(regs, asr);
1791 GET_SBIC_selid (regs, csr);
1792 SET_SBIC_selid (regs, csr | SBIC_SID_FROM_SCSI);
1794 SBIC_TC_PUT(regs, 0);
1795 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
1803 RECV_BYTE(regs, *tmpaddr);
1809 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
1810 GET_SBIC_csr(regs, csr);
1825 SET_SBIC_cmd(regs, SBIC_CMD_CLR_ACK);
1826 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
1827 GET_SBIC_csr(regs, csr);
1838 GET_SBIC_asr(regs, asr);
1871 SET_SBIC_syn(regs,
1915 SET_SBIC_cmd(regs, SBIC_CMD_SET_ATN);
1916 WAIT_CIP(regs);
1949 GET_SBIC_asr(regs, asr);
1978 SET_SBIC_cmd(regs, SBIC_CMD_CLR_ACK);
1983 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
1984 GET_SBIC_csr(regs, csr);
1993 RECV_BYTE(regs, *tmpaddr);
1998 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
1999 GET_SBIC_csr(regs, csr);
2031 SET_SBIC_syn(regs,
2061 SET_SBIC_cmd(regs, SBIC_CMD_SET_ATN);
2062 WAIT_CIP(regs);
2068 SET_SBIC_cmd(regs, SBIC_CMD_CLR_ACK);
2077 SBIC_WAIT(regs, SBIC_ASR_INT, 0);
2079 GET_SBIC_csr(regs, csr);
2101 sbic_regmap_p regs = dev->sc_sbicp;
2112 if ( sbicxfout(regs, acb->clen, &acb->cmd) )
2120 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);
2192 i = sbicxfin(regs, acb->sc_kv.dc_count,
2198 i = sbicxfout(regs, acb->sc_kv.dc_count,
2220 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI |
2239 SBIC_TC_PUT(regs, (unsigned)dev->sc_tcnt);
2244 SET_SBIC_cmd(regs, SBIC_CMD_XFER_INFO);
2270 SET_SBIC_cmd(regs, SBIC_CMD_CLR_ACK);
2289 SEND_BYTE(regs, MSG_REJECT);
2290 WAIT_CIP(regs);
2341 GET_SBIC_rselid(regs, newtarget);
2353 GET_SBIC_data(regs, newlun);
2354 WAIT_CIP(regs);
2364 GET_SBIC_asr(regs, asr);
2383 GET_SBIC_csr(regs,csr);
2447 SET_SBIC_syn(regs,
2451 SET_SBIC_syn(regs, SBIC_SYN (0, sbic_min_period));
2486 SET_SBIC_cmd(regs, SBIC_CMD_CLR_ACK);
2509 SET_SBIC_control(regs, SBIC_CTL_EDI | SBIC_CTL_IDI);