Lines Matching refs:VIA1
119 #define ADB_SET_STATE_IDLE_CUDA() via_reg_or(VIA1, vBufB, (vPB4 | vPB5))
120 #define ADB_SET_STATE_TIP() via_reg_and(VIA1, vBufB, ~vPB5)
121 #define ADB_CLR_STATE_TIP() via_reg_or(VIA1, vBufB, vPB5)
122 #define ADB_TOGGLE_STATE_ACK_CUDA() via_reg_xor(VIA1, vBufB, vPB4)
123 #define ADB_SET_STATE_ACKOFF_CUDA() via_reg_or(VIA1, vBufB, vPB4)
124 #define ADB_SET_SR_INPUT() via_reg_and(VIA1, vACR, ~vSR_OUT)
125 #define ADB_SET_SR_OUTPUT() via_reg_or(VIA1, vACR, vSR_OUT)
126 #define ADB_SR() read_via_reg(VIA1, vSR)
127 #define ADB_VIA_INTR_ENABLE() write_via_reg(VIA1, vIER, 0x84)
128 #define ADB_VIA_INTR_DISABLE() write_via_reg(VIA1, vIER, 0x04)
129 #define ADB_INTR_IS_OFF (vPB3 == (read_via_reg(VIA1, vBufB) & vPB3))
130 #define ADB_INTR_IS_ON (0 == (read_via_reg(VIA1, vBufB) & vPB3))
131 #define ADB_SR_INTR_IS_OFF (0 == (read_via_reg(VIA1, vIFR) & vSR_INT))
132 #define ADB_SR_INTR_IS_ON (vSR_INT == (read_via_reg(VIA1, \
339 reg = read_via_reg(VIA1, vIFR); /* Read the interrupts */ in adb_intr_cuda()
345 write_via_reg(VIA1, vIFR, reg & 0x7f); /* Clear 'em */ in adb_intr_cuda()
459 write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]); in adb_intr_cuda()
528 write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]); /* send next byte */ in adb_intr_cuda()
630 write_via_reg(VIA1, vSR, adbOutputBuffer[adbSentChars + 1]); /* load byte for output */ in send_adb_cuda()
936 write_via_reg(VIA1, vIFR, 0x90); /* clear interrupt */ in adb_hw_setup()
940 via_reg_or(VIA1, vDirB, 0x30); /* register B bits 4 and 5: in adb_hw_setup()
942 via_reg_and(VIA1, vDirB, 0xf7); /* register B bit 3: input */ in adb_hw_setup()
943 via_reg_and(VIA1, vACR, ~vSR_OUT); /* make sure SR is set in adb_hw_setup()
945 write_via_reg(VIA1, vACR, (read_via_reg(VIA1, vACR) | 0x0c) & ~0x10); in adb_hw_setup()
948 write_via_reg(VIA1, vIER, 0x84);/* make sure VIA interrupts in adb_hw_setup()
970 write_via_reg(VIA1, vIER, 0x04);/* turn interrupts off - TO in adb_hw_setup()