242 	struct zs_chanstate *cs;  in zsc_attach()  local
260 		cs  = &xcs->xzs_cs;  in zsc_attach()
261 		zsc->zsc_cs[channel] = cs;  in zsc_attach()
263 		zs_lock_init(cs);  in zsc_attach()
264 		cs->cs_channel = channel;  in zsc_attach()
265 		cs->cs_private = NULL;  in zsc_attach()
266 		cs->cs_ops = &zsops_null;  in zsc_attach()
269 		cs->cs_reg_csr  = &zc->zc_csr;  in zsc_attach()
270 		cs->cs_reg_data = &zc->zc_data;  in zsc_attach()
272 		memcpy(cs->cs_creg, zs_init_reg, 16);  in zsc_attach()
273 		memcpy(cs->cs_preg, zs_init_reg, 16);  in zsc_attach()
276 		cs->cs_brg_clk = PCLK / 16;	/* RTxC is 230400*16, so use 230400 */  in zsc_attach()
277 		cs->cs_defspeed = zs_defspeed[channel];  in zsc_attach()
278 		cs->cs_defcflag = zs_def_cflag;  in zsc_attach()
281 		cs->cs_rr0_dcd = ZSRR0_DCD;  in zsc_attach()
282 		cs->cs_rr0_cts = 0;  in zsc_attach()
283 		cs->cs_wr5_dtr = ZSWR5_DTR;  in zsc_attach()
284 		cs->cs_wr5_rts = 0;  in zsc_attach()
287 		cs->cs_slave_type = ZS_SLAVE_NONE;  in zsc_attach()
319 				device_unit(self), channel, cs->cs_defspeed,  in zsc_attach()
339 			cs->cs_defspeed = 1;  in zsc_attach()
340 			cs->cs_creg[ZSRR_BAUDLO] = cs->cs_preg[ZSRR_BAUDLO] = 0xff;  in zsc_attach()
341 			cs->cs_creg[ZSRR_BAUDHI] = cs->cs_preg[ZSRR_BAUDHI] = 0xff;  in zsc_attach()
342 			zs_write_reg(cs, ZSRR_BAUDLO, 0xff);  in zsc_attach()
343 			zs_write_reg(cs, ZSRR_BAUDHI, 0xff);  in zsc_attach()
372 			zs_write_reg(cs,  9, reset);  in zsc_attach()
392 	cs = zsc->zsc_cs[0];  in zsc_attach()
395 	zs_write_reg(cs, 2, zs_init_reg[2]);  in zsc_attach()
397 	zs_write_reg(cs, 9, zs_init_reg[9]);  in zsc_attach()
416 zsmdioctl(struct zs_chanstate *cs, u_long cmd, void *data)  in zsmdioctl()  argument
426 zsmd_setclock(struct zs_chanstate *cs)  in zsmd_setclock()  argument
428 	struct xzs_chanstate *xcs = (void *)cs;  in zsmd_setclock()
430 	if (cs->cs_channel != 0)  in zsmd_setclock()
501 zs_set_speed(struct zs_chanstate *cs, int bps)  in zs_set_speed()  argument
503 	struct xzs_chanstate *xcs = (void *) cs;  in zs_set_speed()
591 		cs->cs_brg_clk = xcs->cs_clocks[i].clk >> 4;  in zs_set_speed()
593 		cs->cs_brg_clk = PCLK / 16;  in zs_set_speed()
603 		cs->cs_preg[4] = ZSWR4_CLK_X16;  in zs_set_speed()
604 		cs->cs_preg[11]= ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD;  in zs_set_speed()
606 			cs->cs_preg[14] = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;  in zs_set_speed()
608 			cs->cs_preg[14] = ZSWR14_BAUD_ENA;  in zs_set_speed()
612 		cs->cs_preg[4] = tc0;  in zs_set_speed()
614 			cs->cs_preg[11] = ZSWR11_RXCLK_RTXC | ZSWR11_TXCLK_RTXC;  in zs_set_speed()
616 			cs->cs_preg[11] = ZSWR11_RXCLK_TRXC | ZSWR11_TXCLK_TRXC;  in zs_set_speed()
618 		cs->cs_preg[14]= 0;  in zs_set_speed()
622 	cs->cs_preg[12] = tc;  in zs_set_speed()
623 	cs->cs_preg[13] = tc >> 8;  in zs_set_speed()
630 	    cs->cs_preg[4], cs->cs_preg[11], cs->cs_preg[14]);  in zs_set_speed()
633 	cs->cs_preg[5] |= ZSWR5_RTS;	/* Make sure the drivers are on! */  in zs_set_speed()
640 zs_set_modes(struct zs_chanstate *cs, int cflag)  in zs_set_modes()  argument
642 	struct xzs_chanstate *xcs = (void*)cs;  in zs_set_modes()
659 	cs->cs_rr0_pps = 0;  in zs_set_modes()
671 			cs->cs_rr0_pps = ZSRR0_DCD;  in zs_set_modes()
685 		cs->cs_rr0_dcd = 0;  in zs_set_modes()
687 		cs->cs_rr0_dcd = ZSRR0_DCD;  in zs_set_modes()
702 		cs->cs_wr5_dtr = ZSWR5_DTR;  in zs_set_modes()
703 		cs->cs_wr5_rts = 0;  in zs_set_modes()
704 		cs->cs_rr0_cts = ZSRR0_CTS;  in zs_set_modes()
706 		cs->cs_wr5_dtr = 0;  in zs_set_modes()
707 		cs->cs_wr5_rts = ZSWR5_DTR;  in zs_set_modes()
708 		cs->cs_rr0_cts = ZSRR0_CTS;  in zs_set_modes()
710 		cs->cs_wr5_dtr = 0;  in zs_set_modes()
711 		cs->cs_wr5_rts = ZSWR5_DTR;  in zs_set_modes()
712 		cs->cs_rr0_cts = ZSRR0_DCD;  in zs_set_modes()
714 		cs->cs_wr5_dtr = ZSWR5_DTR;  in zs_set_modes()
715 		cs->cs_wr5_rts = 0;  in zs_set_modes()
716 		cs->cs_rr0_cts = 0;  in zs_set_modes()
734 zs_read_reg(struct zs_chanstate *cs, uint8_t reg)  in zs_read_reg()  argument
738 	*cs->cs_reg_csr = reg;  in zs_read_reg()
740 	val = *cs->cs_reg_csr;  in zs_read_reg()
746 zs_write_reg(struct zs_chanstate *cs, uint8_t reg, uint8_t val)  in zs_write_reg()  argument
748 	*cs->cs_reg_csr = reg;  in zs_write_reg()
750 	*cs->cs_reg_csr = val;  in zs_write_reg()
755 zs_read_csr(struct zs_chanstate *cs)  in zs_read_csr()  argument
759 	val = *cs->cs_reg_csr;  in zs_read_csr()
767 zs_write_csr(struct zs_chanstate *cs, uint8_t val)  in zs_write_csr()  argument
770 	*cs->cs_reg_csr = val;  in zs_write_csr()
775 zs_read_data(struct zs_chanstate *cs)  in zs_read_data()  argument
779 	val = *cs->cs_reg_data;  in zs_read_data()
785 zs_write_data(struct zs_chanstate *cs, uint8_t val)  in zs_write_data()  argument
787 	*cs->cs_reg_data = val;  in zs_write_data()
817 	struct zs_chanstate *cs;  in zscnsetup()  local
823 	cs = &xcs.xzs_cs;  in zscnsetup()
825 	cs->cs_reg_csr  = &zc->zc_csr;  in zscnsetup()
826 	cs->cs_reg_data = &zc->zc_data;  in zscnsetup()
827 	cs->cs_channel = zs_consunit;  in zscnsetup()
828 	cs->cs_brg_clk = PCLK / 16;  in zscnsetup()
830 	memcpy(cs->cs_preg, zs_init_reg, 16);  in zscnsetup()
831 	cs->cs_preg[5] |= ZSWR5_DTR | ZSWR5_RTS;  in zscnsetup()
832 	cs->cs_preg[15] = ZSWR15_BREAK_IE;  in zscnsetup()
833 	tconst = BPS_TO_TCONST(cs->cs_brg_clk, zs_defspeed[zs_consunit]);  in zscnsetup()
834 	cs->cs_preg[12] = tconst;  in zscnsetup()
835 	cs->cs_preg[13] = tconst >> 8;  in zscnsetup()
845 	zs_loadchannelregs(cs);  in zscnsetup()
1022 zs_abort(struct zs_chanstate *cs)  in zs_abort()  argument