188 	REGWRITE_2(VRETIMEH, 0, 0);  in init_devices()
189 	REGWRITE_2(VRETIMEM, 0, 0);  in init_devices()
190 	REGWRITE_2(VRETIMEL, 0, 0);  in init_devices()
213 	REGWRITE_2(VR4181_ISABRG_ADDR, ISABRGCTL, 0x0003);  in init_devices()
214 	REGWRITE_2(VR4181_ISABRG_ADDR, XISACTL, 0x0401);  in init_devices()
224 	REGWRITE_2(VR4181_CMU_ADDR, 0, CMUMASK_SIU | CMUMASK_AIU);  in init_devices()
242 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PIOD_L_REG_W, 0xffff);  in init_devices()
243 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE0_REG_W,  in init_devices()
256 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE1_REG_W, GP8_GPO);  in init_devices()
268 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE2_REG_W,  in init_devices()
281 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE3_REG_W,  in init_devices()
298 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PIOD_L_REG_W, 0xffff);  in init_devices()
299 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE0_REG_W,  in init_devices()
314 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE1_REG_W,  in init_devices()
328 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE2_REG_W,  in init_devices()
341 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_MODE3_REG_W,  in init_devices()
356 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_INTTYP_L_REG_W,  in init_devices()
358 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_INTMASK_REG_W,  in init_devices()
360 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_INTEN_REG_W, GIEN4);  in init_devices()
374 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PCS0STRA_REG_W, 0x0000);  in init_devices()
375 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PCS0STPA_REG_W, 0x0fff);  in init_devices()
376 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PCS0HIA_REG_W, 0x1401);  in init_devices()
377 	REGWRITE_2(VR4181_GIU81_ADDR, VR4181GIU_PCSMODE_REG_W,  in init_devices()