1100 	struct tegra_clk *tclk;  in tegra210_car_clock_decode()  local
1108 	tclk = tegra210_car_clock_find_by_id(clock_id);  in tegra210_car_clock_decode()
1109 	if (tclk)  in tegra210_car_clock_decode()
1110 		return TEGRA_CLK_BASE(tclk);  in tegra210_car_clock_decode()
1118 	struct tegra_clk *tclk;  in tegra210_car_clock_get()  local
1120 	tclk = tegra210_car_clock_find(name);  in tegra210_car_clock_get()
1121 	if (tclk == NULL)  in tegra210_car_clock_get()
1124 	atomic_inc_uint(&tclk->refcnt);  in tegra210_car_clock_get()
1126 	return TEGRA_CLK_BASE(tclk);  in tegra210_car_clock_get()
1132 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_put()  local
1134 	KASSERT(tclk->refcnt > 0);  in tegra210_car_clock_put()
1136 	atomic_dec_uint(&tclk->refcnt);  in tegra210_car_clock_put()
1141     struct tegra_clk *tclk)  in tegra210_car_clock_get_rate_pll()  argument
1143 	struct tegra_pll_clk *tpll = &tclk->u.pll;  in tegra210_car_clock_get_rate_pll()
1150 	KASSERT(tclk->type == TEGRA_CLK_PLL);  in tegra210_car_clock_get_rate_pll()
1152 	tclk_parent = tegra210_car_clock_find(tclk->parent);  in tegra210_car_clock_get_rate_pll()
1179     struct tegra_clk *tclk, u_int rate)  in tegra210_car_clock_set_rate_pll()  argument
1181 	struct tegra_pll_clk *tpll = &tclk->u.pll;  in tegra210_car_clock_set_rate_pll()
1187 	clk_parent = tegra210_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));  in tegra210_car_clock_set_rate_pll()
1252 		    tclk->base.name, rate);  in tegra210_car_clock_set_rate_pll()
1260     struct tegra_clk *tclk, struct tegra_clk *tclk_parent)  in tegra210_car_clock_set_parent_mux()  argument
1262 	struct tegra_mux_clk *tmux = &tclk->u.mux;  in tegra210_car_clock_set_parent_mux()
1268 	KASSERT(tclk->type == TEGRA_CLK_MUX);  in tegra210_car_clock_set_parent_mux()
1292     struct tegra_clk *tclk)  in tegra210_car_clock_get_parent_mux()  argument
1294 	struct tegra_mux_clk *tmux = &tclk->u.mux;  in tegra210_car_clock_get_parent_mux()
1298 	KASSERT(tclk->type == TEGRA_CLK_MUX);  in tegra210_car_clock_get_parent_mux()
1314     struct tegra_clk *tclk)  in tegra210_car_clock_get_rate_fixed_div()  argument
1316 	struct tegra_fixed_div_clk *tfixed_div = &tclk->u.fixed_div;  in tegra210_car_clock_get_rate_fixed_div()
1319 	clk_parent = tegra210_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));  in tegra210_car_clock_get_rate_fixed_div()
1329     struct tegra_clk *tclk)  in tegra210_car_clock_get_rate_div()  argument
1331 	struct tegra_div_clk *tdiv = &tclk->u.div;  in tegra210_car_clock_get_rate_div()
1337 	KASSERT(tclk->type == TEGRA_CLK_DIV);  in tegra210_car_clock_get_rate_div()
1339 	clk_parent = tegra210_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));  in tegra210_car_clock_get_rate_div()
1384     struct tegra_clk *tclk, u_int rate)  in tegra210_car_clock_set_rate_div()  argument
1386 	struct tegra_div_clk *tdiv = &tclk->u.div;  in tegra210_car_clock_set_rate_div()
1393 	KASSERT(tclk->type == TEGRA_CLK_DIV);  in tegra210_car_clock_set_rate_div()
1395 	clk_parent = tegra210_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));  in tegra210_car_clock_set_rate_div()
1461     struct tegra_clk *tclk, bool enable)  in tegra210_car_clock_enable_gate()  argument
1463 	struct tegra_gate_clk *tgate = &tclk->u.gate;  in tegra210_car_clock_enable_gate()
1468 	KASSERT(tclk->type == TEGRA_CLK_GATE);  in tegra210_car_clock_enable_gate()
1493 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_get_rate()  local
1496 	switch (tclk->type) {  in tegra210_car_clock_get_rate()
1498 		return tclk->u.fixed.rate;  in tegra210_car_clock_get_rate()
1500 		return tegra210_car_clock_get_rate_pll(priv, tclk);  in tegra210_car_clock_get_rate()
1508 		return tegra210_car_clock_get_rate_fixed_div(priv, tclk);  in tegra210_car_clock_get_rate()
1510 		return tegra210_car_clock_get_rate_div(priv, tclk);  in tegra210_car_clock_get_rate()
1512 		panic("tegra210: unknown tclk type %d", tclk->type);  in tegra210_car_clock_get_rate()
1519 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_set_rate()  local
1524 	switch (tclk->type) {  in tegra210_car_clock_set_rate()
1533 		    rate * tclk->u.fixed_div.div);  in tegra210_car_clock_set_rate()
1537 		return tegra210_car_clock_set_rate_pll(priv, tclk, rate);  in tegra210_car_clock_set_rate()
1539 		return tegra210_car_clock_set_rate_div(priv, tclk, rate);  in tegra210_car_clock_set_rate()
1541 		panic("tegra210: unknown tclk type %d", tclk->type);  in tegra210_car_clock_set_rate()
1548 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_enable()  local
1551 	if (tclk->type != TEGRA_CLK_GATE) {  in tegra210_car_clock_enable()
1558 	return tegra210_car_clock_enable_gate(priv, tclk, true);  in tegra210_car_clock_enable()
1564 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_disable()  local
1566 	if (tclk->type != TEGRA_CLK_GATE)  in tegra210_car_clock_disable()
1569 	return tegra210_car_clock_enable_gate(priv, tclk, false);  in tegra210_car_clock_disable()
1576 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_set_parent()  local
1580 	if (tclk->type != TEGRA_CLK_MUX) {  in tegra210_car_clock_set_parent()
1588 	return tegra210_car_clock_set_parent_mux(priv, tclk, tclk_parent);  in tegra210_car_clock_set_parent()
1594 	struct tegra_clk *tclk = TEGRA_CLK_PRIV(clk);  in tegra210_car_clock_get_parent()  local
1597 	switch (tclk->type) {  in tegra210_car_clock_get_parent()
1603 		if (tclk->parent) {  in tegra210_car_clock_get_parent()
1604 			tclk_parent = tegra210_car_clock_find(tclk->parent);  in tegra210_car_clock_get_parent()
1608 		tclk_parent = tegra210_car_clock_get_parent_mux(priv, tclk);  in tegra210_car_clock_get_parent()