1235 	struct tegra_div_clk *tdiv = &tclk->u.div;  in tegra124_car_clock_get_rate_div()  local
1246 	const uint32_t v = bus_space_read_4(bst, bsh, tdiv->reg);  in tegra124_car_clock_get_rate_div()
1247 	const u_int raw_div = __SHIFTOUT(v, tdiv->bits);  in tegra124_car_clock_get_rate_div()
1249 	switch (tdiv->reg) {  in tegra124_car_clock_get_rate_div()
1282 	struct tegra_div_clk *tdiv = &tclk->u.div;  in tegra124_car_clock_set_rate_div()  local
1296 	v = bus_space_read_4(bst, bsh, tdiv->reg);  in tegra124_car_clock_set_rate_div()
1298 	raw_div = __SHIFTOUT(tdiv->bits, tdiv->bits);  in tegra124_car_clock_set_rate_div()
1300 	switch (tdiv->reg) {  in tegra124_car_clock_set_rate_div()
1353 	v &= ~tdiv->bits;  in tegra124_car_clock_set_rate_div()
1354 	v |= __SHIFTIN(raw_div, tdiv->bits);  in tegra124_car_clock_set_rate_div()
1356 	bus_space_write_4(bst, bsh, tdiv->reg, v);  in tegra124_car_clock_set_rate_div()