Lines Matching defs:its

99 gits_read_4(struct gicv3_its *its, bus_size_t reg)
101 	return bus_space_read_4(its->its_bst, its->its_bsh, reg);
105 gits_write_4(struct gicv3_its *its, bus_size_t reg, uint32_t val)
107 	bus_space_write_4(its->its_bst, its->its_bsh, reg, val);
111 gits_read_8(struct gicv3_its *its, bus_size_t reg)
113 	return bus_space_read_8(its->its_bst, its->its_bsh, reg);
117 gits_write_8(struct gicv3_its *its, bus_size_t reg, uint64_t val)
119 	bus_space_write_8(its->its_bst, its->its_bsh, reg, val);
123 gits_command(struct gicv3_its *its, const struct gicv3_its_command *cmd)
128 	creadr = gits_read_8(its, GITS_CREADR);
134 	cwriter = gits_read_8(its, GITS_CWRITER);
137 	uint64_t *dw = (uint64_t *)(its->its_cmd.base + woff);
143 	if (its->its_cmd_flush) {
149 	if (woff == its->its_cmd.len)
152 	gits_write_8(its, GITS_CWRITER, woff);
158 gits_command_mapc(struct gicv3_its *its, uint16_t icid, uint64_t rdbase, bool v)
176 	    its->its_id, icid, rdbase, v));
178 	return gits_command(its, &cmd);
182 gits_command_mapd(struct gicv3_its *its, uint32_t deviceid, uint64_t itt_addr, u_int size, bool v)
189 	 * Map a device table entry (DeviceID) to its associated ITT (ITT_addr).
199 	    its->its_id, deviceid, itt_addr, size, v));
201 	return gits_command(its, &cmd);
205 gits_command_mapti(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint32_t pintid, uint16_t icid)
210 	 * Map the event defined by EventID and DeviceID to its associated ITE, defined by ICID and pINTID
219 	    its->its_id, deviceid, eventid, pintid, icid));
221 	return gits_command(its, &cmd);
225 gits_command_movi(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid, uint16_t icid)
239 	    its->its_id, deviceid, eventid, icid));
241 	return gits_command(its, &cmd);
245 gits_command_inv(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
258 	    its->its_id, deviceid, eventid));
260 	return gits_command(its, &cmd);
264 gits_command_invall(struct gicv3_its *its, uint16_t icid)
276 	DPRINTF(("ITS #%u: INVALL icid 0x%x\n", its->its_id, icid));
278 	return gits_command(its, &cmd);
282 gits_command_sync(struct gicv3_its *its, uint64_t rdbase)
297 	DPRINTF(("ITS #%u: SYNC rdbase 0x%lx\n", its->its_id, rdbase));
299 	return gits_command(its, &cmd);
304 gits_command_int(struct gicv3_its *its, uint32_t deviceid, uint32_t eventid)
319 	    its->its_id, deviceid, eventid));
321 	return gits_command(its, &cmd);
326 gits_wait(struct gicv3_its *its)
336 		woff = gits_read_8(its, GITS_CWRITER) & GITS_CWRITER_Offset;
337 		roff = gits_read_8(its, GITS_CREADR) & GITS_CREADR_Offset;
343 		device_printf(its->its_gic->sc_dev,
345 		    gits_read_8(its, GITS_CREADR), gits_read_8(its, GITS_CWRITER));
353 gicv3_its_msi_alloc_lpi(struct gicv3_its *its,
359 	KASSERT(its->its_gic->sc_lpi_pool != NULL);
361 	if (vmem_alloc(its->its_gic->sc_lpi_pool, 1, VM_INSTANTFIT|VM_SLEEP, &n) != 0)
364 	KASSERT(its->its_pa[n] == NULL);
368 	its->its_pa[n] = new_pa;
369 	return n + its->its_pic->pic_irqbase;
373 gicv3_its_msi_free_lpi(struct gicv3_its *its, int lpi)
377 	KASSERT(its->its_gic->sc_lpi_pool != NULL);
378 	KASSERT(lpi >= its->its_pic->pic_irqbase);
380 	pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
381 	its->its_pa[lpi - its->its_pic->pic_irqbase] = NULL;
384 	vmem_free(its->its_gic->sc_lpi_pool, lpi - its->its_pic->pic_irqbase, 1);
401 gicv3_its_device_map(struct gicv3_its *its, uint32_t devid, u_int count)
404 	struct gicv3_its_table *itstab = &its->its_tab_device;
412 	const uint64_t typer = gits_read_8(its, GITS_TYPER);
416 	LIST_FOREACH(dev, &its->its_devices, dev_list)
429 		gicv3_dma_alloc(its->its_gic, &pt->pt_dma, itstab->tab_l2_entry_size,
451 	gicv3_dma_alloc(its->its_gic, &dev->dev_itt, itt_size, GITS_ITT_ALIGN);
452 	LIST_INSERT_HEAD(&its->its_devices, dev, dev_list);
454 	if (its->its_cmd_flush) {
463 	mutex_enter(its->its_lock);
464 	error = gits_command_mapd(its, devid, dev->dev_itt.segs[0].ds_addr, size, true);
466 		error = gits_wait(its);
468 	mutex_exit(its->its_lock);
474 gicv3_its_msi_enable(struct gicv3_its *its, int lpi, int count)
476 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
490 	const uint64_t addr = its->its_base + GITS_TRANSLATER;
498 		    lpi - its->its_pic->pic_irqbase);
504 		    lpi - its->its_pic->pic_irqbase);
511 gicv3_its_msi_disable(struct gicv3_its *its, int lpi)
513 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
528 gicv3_its_msix_enable(struct gicv3_its *its, int lpi, int msix_vec,
531 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
541 	const uint64_t addr = its->its_base + GITS_TRANSLATER;
545 	bus_space_write_4(bst, bsh, entry_base + PCI_MSIX_TABLE_ENTRY_DATA, lpi - its->its_pic->pic_irqbase);
556 gicv3_its_msix_disable(struct gicv3_its *its, int lpi)
558 	const struct pci_attach_args *pa = its->its_pa[lpi - its->its_pic->pic_irqbase];
576 	struct gicv3_its * const its = msi->msi_priv;
584 	const uint64_t typer = gits_read_8(its, GITS_TYPER);
591 	if (gicv3_its_device_map(its, devid, *count) != 0)
595 	mutex_enter(its->its_lock);
597 		const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
605 			gicv3_its_msi_enable(its, lpi, *count);
610 		its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
611 		its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
616 		gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
617 		gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
619 	error = gits_wait(its);
620 	mutex_exit(its->its_lock);
634 	struct gicv3_its * const its = msi->msi_priv;
647 	const uint64_t typer = gits_read_8(its, GITS_TYPER);
667 	if (gicv3_its_device_map(its, devid, *count) != 0) {
673 	mutex_enter(its->its_lock);
675 		const int lpi = gicv3_its_msi_alloc_lpi(its, pa);
683 		gicv3_its_msix_enable(its, lpi, msix_vec, bst, bsh);
688 		its->its_devid[lpi - its->its_pic->pic_irqbase] = devid;
689 		its->its_targets[lpi - its->its_pic->pic_irqbase] = ci;
694 		gits_command_mapti(its, devid, lpi - its->its_pic->pic_irqbase, lpi, cpu_index(ci));
695 		gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
697 	gits_wait(its);
698 	mutex_exit(its->its_lock);
709 	struct gicv3_its * const its = msi->msi_priv;
715 	intrh = pic_establish_intr(its->its_pic, lpi - its->its_pic->pic_irqbase, ipl,
721 	KASSERT(its->its_pa[lpi - its->its_pic->pic_irqbase] != NULL);
722 	const uint32_t devid = its->its_devid[lpi - its->its_pic->pic_irqbase];
723 	gits_command_inv(its, devid, lpi - its->its_pic->pic_irqbase);
732 	struct gicv3_its * const its = msi->msi_priv;
737 		KASSERT(lpi >= its->its_pic->pic_irqbase);
739 			gicv3_its_msix_disable(its, lpi);
741 			gicv3_its_msi_disable(its, lpi);
742 		gicv3_its_msi_free_lpi(its, lpi);
743 		its->its_targets[lpi - its->its_pic->pic_irqbase] = NULL;
744 		its->its_devid[lpi - its->its_pic->pic_irqbase] = 0;
746 		    its->its_pic->pic_sources[lpi - its->its_pic->pic_irqbase];
753 gicv3_its_command_init(struct gicv3_softc *sc, struct gicv3_its *its)
757 	gicv3_dma_alloc(sc, &its->its_cmd, GITS_COMMANDS_SIZE, GITS_COMMANDS_ALIGN);
758 	if (its->its_cmd_flush) {
759 		cpu_dcache_wb_range((vaddr_t)its->its_cmd.base, GITS_COMMANDS_SIZE);
763 	KASSERT((gits_read_4(its, GITS_CTLR) & GITS_CTLR_Enabled) == 0);
764 	KASSERT((gits_read_4(its, GITS_CTLR) & GITS_CTLR_Quiescent) != 0);
766 	cbaser = its->its_cmd.segs[0].ds_addr;
767 	cbaser |= __SHIFTIN((its->its_cmd.len / 4096) - 1, GITS_CBASER_Size);
772 	gits_write_8(its, GITS_CBASER, cbaser);
774 	tmp = gits_read_8(its, GITS_CBASER);
781 			gits_write_8(its, GITS_CBASER, cbaser);
784 		its->its_cmd_flush = true;
787 	    its->its_cmd.segs[0].ds_addr, its->its_cmd.len,
791 	gits_write_8(its, GITS_CWRITER, 0);
795 gicv3_its_table_params(struct gicv3_softc *sc, struct gicv3_its *its,
799 	const uint64_t typer = gits_read_8(its, GITS_TYPER);
800 	const uint32_t iidr = gits_read_4(its, GITS_IIDR);
816 gicv3_its_table_probe_indirect(struct gicv3_its *its, int tab)
820 	baser = gits_read_8(its, GITS_BASERn(tab));
822 	gits_write_8(its, GITS_BASERn(tab), baser);
824 	baser = gits_read_8(its, GITS_BASERn(tab));
830 gicv3_its_table_init(struct gicv3_softc *sc, struct gicv3_its *its)
838 	gicv3_its_table_params(sc, its, &devbits, &innercache, &share);
849 		baser = gits_read_8(its, GITS_BASERn(tab));
876 			    gicv3_its_table_probe_indirect(its, tab);
894 			itstab = &its->its_tab_device;
918 		gicv3_dma_alloc(sc, &its->its_tab[tab], table_size, table_align);
919 		if (its->its_cmd_flush) {
920 			cpu_dcache_wb_range((vaddr_t)its->its_tab[tab].base, table_size);
927 		baser |= its->its_tab[tab].segs[0].ds_addr;
939 		gits_write_8(its, GITS_BASERn(tab), baser);
941 		baser = gits_read_8(its, GITS_BASERn(tab));
946 			gits_write_8(its, GITS_BASERn(tab), baser);
949 		baser = gits_read_8(its, GITS_BASERn(tab));
951 		    tab, table_type, its->its_tab[tab].segs[0].ds_addr, table_size,
957 			its->its_tab_device.tab_l1 = its->its_tab[tab].base;
958 			its->its_tab_device.tab_shareable =
966 gicv3_its_enable(struct gicv3_softc *sc, struct gicv3_its *its)
970 	ctlr = gits_read_4(its, GITS_CTLR);
972 	gits_write_4(its, GITS_CTLR, ctlr);
978 	struct gicv3_its * const its = priv;
979 	struct gicv3_softc * const sc = its->its_gic;
983 	const uint64_t typer = bus_space_read_8(sc->sc_bst, its->its_bsh, GITS_TYPER);
990 	its->its_rdbase[cpu_index(ci)] = rdbase;
995 	mutex_enter(its->its_lock);
996 	gits_command_mapc(its, cpu_index(ci), rdbase, true);
997 	gits_command_invall(its, cpu_index(ci));
998 	gits_wait(its);
1003 	for (irq = 0; irq < its->its_pic->pic_maxsources; irq++) {
1004 		if (its->its_targets[irq] != ci)
1006 		KASSERT(its->its_pa[irq] != NULL);
1008 		const uint32_t devid = its->its_devid[irq];
1009 		gits_command_movi(its, devid, irq, cpu_index(ci));
1010 		gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
1012 	gits_wait(its);
1013 	mutex_exit(its->its_lock);
1015 	its->its_cpuonline[cpu_index(ci)] = true;
1021 	struct gicv3_its * const its = priv;
1024 	ci = its->its_targets[irq];
1032 	struct gicv3_its * const its = priv;
1040 	pa = its->its_pa[irq];
1045 	its->its_targets[irq] = ci;
1047 	if (its->its_cpuonline[cpu_index(ci)] == true) {
1049 		mutex_enter(its->its_lock);
1050 		gits_command_movi(its, devid, irq, cpu_index(ci));
1051 		gits_command_sync(its, its->its_rdbase[cpu_index(ci)]);
1052 		mutex_exit(its->its_lock);
1062 	struct gicv3_its *its;
1069 	its = kmem_zalloc(sizeof(*its), KM_SLEEP);
1070 	its->its_id = its_id;
1071 	its->its_bst = sc->sc_bst;
1072 	its->its_bsh = bsh;
1073 	its->its_dmat = sc->sc_dmat;
1074 	its->its_base = its_base;
1075 	its->its_pic = &sc->sc_lpi;
1076 	snprintf(its->its_pic->pic_name, sizeof(its->its_pic->pic_name), "gicv3-its");
1077 	KASSERT(its->its_pic->pic_maxsources > 0);
1078 	its->its_pa = kmem_zalloc(sizeof(struct pci_attach_args *) * its->its_pic->pic_maxsources, KM_SLEEP);
1079 	its->its_targets = kmem_zalloc(sizeof(struct cpu_info *) * its->its_pic->pic_maxsources, KM_SLEEP);
1080 	its->its_devid = kmem_zalloc(sizeof(uint32_t) * its->its_pic->pic_maxsources, KM_SLEEP);
1081 	its->its_gic = sc;
1082 	its->its_rdbase = kmem_zalloc(sizeof(*its->its_rdbase) * ncpu, KM_SLEEP);
1083 	its->its_cpuonline = kmem_zalloc(sizeof(*its->its_cpuonline) * ncpu, KM_SLEEP);
1084 	its->its_cb.cpu_init = gicv3_its_cpu_init;
1085 	its->its_cb.get_affinity = gicv3_its_get_affinity;
1086 	its->its_cb.set_affinity = gicv3_its_set_affinity;
1087 	its->its_cb.priv = its;
1088 	LIST_INIT(&its->its_devices);
1089 	LIST_INSERT_HEAD(&sc->sc_lpi_callbacks, &its->its_cb, list);
1090 	its->its_lock = mutex_obj_alloc(MUTEX_SPIN, IPL_NONE);
1092 	gicv3_its_command_init(sc, its);
1093 	gicv3_its_table_init(sc, its);
1095 	gicv3_its_enable(sc, its);
1097 	gicv3_its_cpu_init(its, curcpu());
1099 	msi = &its->its_msi;
1102 	msi->msi_priv = its;