Lines Matching refs:ch_index
58 uint8_t ch_index; member
154 ch->ch_index = index; in bcm_dmac_attach()
180 cs = DMAC_READ(sc, DMAC_CS(ch->ch_index)); in bcm_dmac_intr()
181 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), cs); in bcm_dmac_intr()
184 ce = DMAC_READ(sc, DMAC_DEBUG(ch->ch_index)); in bcm_dmac_intr()
187 DMAC_WRITE(sc, DMAC_DEBUG(ch->ch_index), ce); in bcm_dmac_intr()
233 if (!fdtbus_intr_str(phandle, ch->ch_index, intrstr, sizeof(intrstr))) { in bcm_dmac_alloc()
240 ch->ch_index); in bcm_dmac_alloc()
241 ch->ch_ih = fdtbus_intr_establish_xname(phandle, ch->ch_index, ipl, 0, in bcm_dmac_alloc()
245 "failed to establish interrupt for DMA%d and %s\n", ch->ch_index, in bcm_dmac_alloc()
264 val = DMAC_READ(sc, DMAC_CS(ch->ch_index)); in bcm_dmac_free()
267 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val); in bcm_dmac_free()
282 DMAC_WRITE(sc, DMAC_CONBLK_AD(ch->ch_index), addr); in bcm_dmac_set_conblk_addr()
291 val = DMAC_READ(sc, DMAC_CS(ch->ch_index)); in bcm_dmac_transfer()
296 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val); in bcm_dmac_transfer()
308 val = DMAC_READ(sc, DMAC_CS(ch->ch_index)); in bcm_dmac_halt()
310 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val); in bcm_dmac_halt()
315 DMAC_WRITE(sc, DMAC_NEXTCONBK(ch->ch_index), 0); in bcm_dmac_halt()
319 DMAC_WRITE(sc, DMAC_CS(ch->ch_index), val); in bcm_dmac_halt()