Lines Matching refs:aprint_error
324 aprint_error("\tHPC %d: ERR=0x%08x; DMA %s Memory, " in dwlpx_errintr()
329 aprint_error("\t PCI device asserted SERR_L\n"); in dwlpx_errintr()
331 aprint_error("\t Incremental Latency Exceeded\n"); in dwlpx_errintr()
333 aprint_error("\t CPU access of SG RAM Parity Error\n"); in dwlpx_errintr()
335 aprint_error("\t Illegal CSR Address Error\n"); in dwlpx_errintr()
337 aprint_error("\t Nonexistent PCI Address Error\n"); in dwlpx_errintr()
339 aprint_error("\t PCI Target Disconnect Error\n"); in dwlpx_errintr()
341 aprint_error("\t PCI Target Abort Error\n"); in dwlpx_errintr()
343 aprint_error("\t PCI Write Parity Error\n"); in dwlpx_errintr()
345 aprint_error("\t PCI Data Parity Error\n"); in dwlpx_errintr()
347 aprint_error("\t PCI Address Parity Error\n"); in dwlpx_errintr()
349 aprint_error("\t SG Map RAM Invalid Entry Error\n"); in dwlpx_errintr()
351 aprint_error("\t DMA access of SG RAM Parity Error\n"); in dwlpx_errintr()
353 aprint_error("\t DMA Read Return Parity Error\n"); in dwlpx_errintr()
355 aprint_error("\t PCI Master Abort Error\n"); in dwlpx_errintr()
357 aprint_error("\t CSR Parity Error\n"); in dwlpx_errintr()
359 aprint_error("\t CSR Overrun Error\n"); in dwlpx_errintr()
361 aprint_error("\t Mailbox Parity Error\n"); in dwlpx_errintr()
363 aprint_error("\t Mailbox Illegal Length Error\n"); in dwlpx_errintr()