Lines Matching refs:mips_arch
266 #define TARGET_LOONGSON_2E (mips_arch == PROCESSOR_LOONGSON_2E)
267 #define TARGET_LOONGSON_2F (mips_arch == PROCESSOR_LOONGSON_2F)
269 #define TARGET_GS464 (mips_arch == PROCESSOR_GS464)
270 #define TARGET_GS464E (mips_arch == PROCESSOR_GS464E)
271 #define TARGET_GS264E (mips_arch == PROCESSOR_GS264E)
272 #define TARGET_MIPS3900 (mips_arch == PROCESSOR_R3900)
273 #define TARGET_MIPS4000 (mips_arch == PROCESSOR_R4000)
274 #define TARGET_MIPS4120 (mips_arch == PROCESSOR_R4120)
275 #define TARGET_MIPS4130 (mips_arch == PROCESSOR_R4130)
276 #define TARGET_MIPS5400 (mips_arch == PROCESSOR_R5400)
277 #define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500)
278 #define TARGET_MIPS5900 (mips_arch == PROCESSOR_R5900)
279 #define TARGET_MIPS7000 (mips_arch == PROCESSOR_R7000)
280 #define TARGET_MIPS8000 (mips_arch == PROCESSOR_R8000)
281 #define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
282 #define TARGET_OCTEON (mips_arch == PROCESSOR_OCTEON \
283 || mips_arch == PROCESSOR_OCTEON2 \
284 || mips_arch == PROCESSOR_OCTEON3)
285 #define TARGET_OCTEON2 (mips_arch == PROCESSOR_OCTEON2 \
286 || mips_arch == PROCESSOR_OCTEON3)
287 #define TARGET_SB1 (mips_arch == PROCESSOR_SB1 \
288 || mips_arch == PROCESSOR_SB1A)
289 #define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
290 #define TARGET_XLP (mips_arch == PROCESSOR_XLP)
3208 extern enum processor mips_arch; /* which cpu to codegen for */