Lines Matching refs:CGEN_MODE_USI

107   { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
108   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
114   { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
115   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
120   { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
123   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
128   { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
130   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
135   { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
136   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
138   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
143   { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
144   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
146   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
152   { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
153   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
155   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
161   { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
162   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
164   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
169   { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
170   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
175   { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
176   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
210   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
215   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
218   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
224   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
282   { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 },
356   { INPUT, "scr", HW_H_CR, CGEN_MODE_USI, OP_ENT (SCR), 0, 0 },
377   { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 },
401   { INPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
402   { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
404   { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
406   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
501   { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
503   { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
507   { OUTPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
508   { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
510   { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
564   { INPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
566   { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
572   { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },