Lines Matching refs:src2
675 MRMDestMem, (outs), (ins i8mem:$dst, GR8:$src2),
677 "{$src2, $dst|$dst, $src2}"),
678 [(set EFLAGS, (Op addr:$dst, GR8:$src2))]>, LOCK;
682 MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src2),
684 "{$src2, $dst|$dst, $src2}"),
685 [(set EFLAGS, (Op addr:$dst, GR16:$src2))]>,
690 MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src2),
692 "{$src2, $dst|$dst, $src2}"),
693 [(set EFLAGS, (Op addr:$dst, GR32:$src2))]>,
698 MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src2),
700 "{$src2, $dst|$dst, $src2}"),
701 [(set EFLAGS, (Op addr:$dst, GR64:$src2))]>, LOCK;
707 ImmMod, (outs), (ins i16mem :$dst, i16i8imm :$src2),
709 "{$src2, $dst|$dst, $src2}"),
710 [(set EFLAGS, (Op addr:$dst, i16immSExt8:$src2))]>,
715 ImmMod, (outs), (ins i32mem :$dst, i32i8imm :$src2),
717 "{$src2, $dst|$dst, $src2}"),
718 [(set EFLAGS, (Op addr:$dst, i32immSExt8:$src2))]>,
723 ImmMod, (outs), (ins i64mem :$dst, i64i8imm :$src2),
725 "{$src2, $dst|$dst, $src2}"),
726 [(set EFLAGS, (Op addr:$dst, i64immSExt8:$src2))]>,
731 ImmMod, (outs), (ins i8mem :$dst, i8imm :$src2),
733 "{$src2, $dst|$dst, $src2}"),
734 [(set EFLAGS, (Op addr:$dst, (i8 imm:$src2)))]>, LOCK;
738 ImmMod, (outs), (ins i16mem :$dst, i16imm :$src2),
740 "{$src2, $dst|$dst, $src2}"),
741 [(set EFLAGS, (Op addr:$dst, (i16 imm:$src2)))]>,
746 ImmMod, (outs), (ins i32mem :$dst, i32imm :$src2),
748 "{$src2, $dst|$dst, $src2}"),
749 [(set EFLAGS, (Op addr:$dst, (i32 imm:$src2)))]>,
754 ImmMod, (outs), (ins i64mem :$dst, i64i32imm :$src2),
756 "{$src2, $dst|$dst, $src2}"),
757 [(set EFLAGS, (Op addr:$dst, i64immSExt32:$src2))]>,
1014 def : Pat<(op FR32:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1015 (!cast<Instruction>(Name#"SSrm") FR32:$src1, addr:$src2)>,
1017 def : Pat<(op FR32:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1018 (!cast<Instruction>("V"#Name#"SSrm") FR32:$src1, addr:$src2)>,
1020 def : Pat<(op FR32X:$src1, (bitconvert (i32 (atomic_load_32 addr:$src2)))),
1021 (!cast<Instruction>("V"#Name#"SSZrm") FR32X:$src1, addr:$src2)>,
1024 def : Pat<(op FR64:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1025 (!cast<Instruction>(Name#"SDrm") FR64:$src1, addr:$src2)>,
1027 def : Pat<(op FR64:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1028 (!cast<Instruction>("V"#Name#"SDrm") FR64:$src1, addr:$src2)>,
1030 def : Pat<(op FR64X:$src1, (bitconvert (i64 (atomic_load_64 addr:$src2)))),
1031 (!cast<Instruction>("V"#Name#"SDZrm") FR64X:$src1, addr:$src2)>,
1401 def ADD8rr_DB : I<0, Pseudo, (outs GR8:$dst), (ins GR8:$src1, GR8:$src2),
1403 [(set GR8:$dst, (or_is_add GR8:$src1, GR8:$src2))]>;
1404 def ADD16rr_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, GR16:$src2),
1406 [(set GR16:$dst, (or_is_add GR16:$src1, GR16:$src2))]>;
1407 def ADD32rr_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
1409 [(set GR32:$dst, (or_is_add GR32:$src1, GR32:$src2))]>;
1410 def ADD64rr_DB : I<0, Pseudo, (outs GR64:$dst), (ins GR64:$src1, GR64:$src2),
1412 [(set GR64:$dst, (or_is_add GR64:$src1, GR64:$src2))]>;
1419 (outs GR8:$dst), (ins GR8:$src1, i8imm:$src2),
1421 [(set GR8:$dst, (or_is_add GR8:$src1, imm:$src2))]>;
1423 (outs GR16:$dst), (ins GR16:$src1, i16i8imm:$src2),
1425 [(set GR16:$dst,(or_is_add GR16:$src1,i16immSExt8:$src2))]>;
1426 def ADD16ri_DB : I<0, Pseudo, (outs GR16:$dst), (ins GR16:$src1, i16imm:$src2),
1428 [(set GR16:$dst, (or_is_add GR16:$src1, imm:$src2))]>;
1431 (outs GR32:$dst), (ins GR32:$src1, i32i8imm:$src2),
1433 [(set GR32:$dst,(or_is_add GR32:$src1,i32immSExt8:$src2))]>;
1434 def ADD32ri_DB : I<0, Pseudo, (outs GR32:$dst), (ins GR32:$src1, i32imm:$src2),
1436 [(set GR32:$dst, (or_is_add GR32:$src1, imm:$src2))]>;
1440 (outs GR64:$dst), (ins GR64:$src1, i64i8imm:$src2),
1443 i64immSExt8:$src2))]>;
1445 (outs GR64:$dst), (ins GR64:$src1, i64i32imm:$src2),
1448 i64immSExt32:$src2))]>;
1474 def : Pat<(sub_is_xor imm:$src2, GR8:$src1),
1475 (XOR8ri GR8:$src1, imm:$src2)>;
1476 def : Pat<(sub_is_xor i16immSExt8:$src2, GR16:$src1),
1477 (XOR16ri8 GR16:$src1, i16immSExt8:$src2)>;
1478 def : Pat<(sub_is_xor imm:$src2, GR16:$src1),
1479 (XOR16ri GR16:$src1, imm:$src2)>;
1480 def : Pat<(sub_is_xor i32immSExt8:$src2, GR32:$src1),
1481 (XOR32ri8 GR32:$src1, i32immSExt8:$src2)>;
1482 def : Pat<(sub_is_xor imm:$src2, GR32:$src1),
1483 (XOR32ri GR32:$src1, imm:$src2)>;
1484 def : Pat<(sub_is_xor i64immSExt8:$src2, GR64:$src1),
1485 (XOR64ri8 GR64:$src1, i64immSExt8:$src2)>;
1486 def : Pat<(sub_is_xor i64immSExt32:$src2, GR64:$src1),
1487 (XOR64ri32 GR64:$src1, i64immSExt32:$src2)>;
1840 def : Pat<(X86fshl GR16:$src1, GR16:$src2, (shiftMask32 CL)),
1841 (SHLD16rrCL GR16:$src1, GR16:$src2)>;
1842 def : Pat<(X86fshr GR16:$src2, GR16:$src1, (shiftMask32 CL)),
1843 (SHRD16rrCL GR16:$src1, GR16:$src2)>;
1846 def : Pat<(fshl GR32:$src1, GR32:$src2, (shiftMask32 CL)),
1847 (SHLD32rrCL GR32:$src1, GR32:$src2)>;
1848 def : Pat<(fshr GR32:$src2, GR32:$src1, (shiftMask32 CL)),
1849 (SHRD32rrCL GR32:$src1, GR32:$src2)>;
1852 def : Pat<(fshl GR64:$src1, GR64:$src2, (shiftMask64 CL)),
1853 (SHLD64rrCL GR64:$src1, GR64:$src2)>;
1854 def : Pat<(fshr GR64:$src2, GR64:$src1, (shiftMask64 CL)),
1855 (SHRD64rrCL GR64:$src1, GR64:$src2)>;
1859 def : Pat<(sra GR32:$src1, (shiftMask32 GR8:$src2)),
1862 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1863 def : Pat<(sra GR64:$src1, (shiftMask64 GR8:$src2)),
1866 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1868 def : Pat<(srl GR32:$src1, (shiftMask32 GR8:$src2)),
1871 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1872 def : Pat<(srl GR64:$src1, (shiftMask64 GR8:$src2)),
1875 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1877 def : Pat<(shl GR32:$src1, (shiftMask32 GR8:$src2)),
1880 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1881 def : Pat<(shl GR64:$src1, (shiftMask64 GR8:$src2)),
1884 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1887 def : Pat<(sra (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1890 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1891 def : Pat<(sra (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1894 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1896 def : Pat<(srl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1899 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1900 def : Pat<(srl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1903 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1905 def : Pat<(shl (loadi32 addr:$src1), (shiftMask32 GR8:$src2)),
1908 (i32 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1909 def : Pat<(shl (loadi64 addr:$src1), (shiftMask64 GR8:$src2)),
1912 (i64 (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1919 def : Pat<(and RC:$src1, (rotl -2, GR8:$src2)),
1921 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1922 def : Pat<(or RC:$src1, (shl 1, GR8:$src2)),
1924 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1925 def : Pat<(xor RC:$src1, (shl 1, GR8:$src2)),
1927 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1930 def : Pat<(and RC:$src1, (rotl -2, (ShiftMask GR8:$src2))),
1932 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1933 def : Pat<(or RC:$src1, (shl 1, (ShiftMask GR8:$src2))),
1935 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1936 def : Pat<(xor RC:$src1, (shl 1, (ShiftMask GR8:$src2))),
1938 (INSERT_SUBREG (VT (IMPLICIT_DEF)), GR8:$src2, sub_8bit))>;
1950 def : Pat<(add GR8 :$src1, GR8 :$src2), (ADD8rr GR8 :$src1, GR8 :$src2)>;
1951 def : Pat<(add GR16:$src1, GR16:$src2), (ADD16rr GR16:$src1, GR16:$src2)>;
1952 def : Pat<(add GR32:$src1, GR32:$src2), (ADD32rr GR32:$src1, GR32:$src2)>;
1953 def : Pat<(add GR64:$src1, GR64:$src2), (ADD64rr GR64:$src1, GR64:$src2)>;
1956 def : Pat<(add GR8:$src1, (loadi8 addr:$src2)),
1957 (ADD8rm GR8:$src1, addr:$src2)>;
1958 def : Pat<(add GR16:$src1, (loadi16 addr:$src2)),
1959 (ADD16rm GR16:$src1, addr:$src2)>;
1960 def : Pat<(add GR32:$src1, (loadi32 addr:$src2)),
1961 (ADD32rm GR32:$src1, addr:$src2)>;
1962 def : Pat<(add GR64:$src1, (loadi64 addr:$src2)),
1963 (ADD64rm GR64:$src1, addr:$src2)>;
1966 def : Pat<(add GR8 :$src1, imm:$src2), (ADD8ri GR8:$src1 , imm:$src2)>;
1967 def : Pat<(add GR16:$src1, imm:$src2), (ADD16ri GR16:$src1, imm:$src2)>;
1968 def : Pat<(add GR32:$src1, imm:$src2), (ADD32ri GR32:$src1, imm:$src2)>;
1969 def : Pat<(add GR16:$src1, i16immSExt8:$src2),
1970 (ADD16ri8 GR16:$src1, i16immSExt8:$src2)>;
1971 def : Pat<(add GR32:$src1, i32immSExt8:$src2),
1972 (ADD32ri8 GR32:$src1, i32immSExt8:$src2)>;
1973 def : Pat<(add GR64:$src1, i64immSExt8:$src2),
1974 (ADD64ri8 GR64:$src1, i64immSExt8:$src2)>;
1975 def : Pat<(add GR64:$src1, i64immSExt32:$src2),
1976 (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>;
1979 def : Pat<(sub GR8 :$src1, GR8 :$src2), (SUB8rr GR8 :$src1, GR8 :$src2)>;
1980 def : Pat<(sub GR16:$src1, GR16:$src2), (SUB16rr GR16:$src1, GR16:$src2)>;
1981 def : Pat<(sub GR32:$src1, GR32:$src2), (SUB32rr GR32:$src1, GR32:$src2)>;
1982 def : Pat<(sub GR64:$src1, GR64:$src2), (SUB64rr GR64:$src1, GR64:$src2)>;
1985 def : Pat<(sub GR8:$src1, (loadi8 addr:$src2)),
1986 (SUB8rm GR8:$src1, addr:$src2)>;
1987 def : Pat<(sub GR16:$src1, (loadi16 addr:$src2)),
1988 (SUB16rm GR16:$src1, addr:$src2)>;
1989 def : Pat<(sub GR32:$src1, (loadi32 addr:$src2)),
1990 (SUB32rm GR32:$src1, addr:$src2)>;
1991 def : Pat<(sub GR64:$src1, (loadi64 addr:$src2)),
1992 (SUB64rm GR64:$src1, addr:$src2)>;
1995 def : Pat<(sub GR8:$src1, imm:$src2),
1996 (SUB8ri GR8:$src1, imm:$src2)>;
1997 def : Pat<(sub GR16:$src1, imm:$src2),
1998 (SUB16ri GR16:$src1, imm:$src2)>;
1999 def : Pat<(sub GR32:$src1, imm:$src2),
2000 (SUB32ri GR32:$src1, imm:$src2)>;
2001 def : Pat<(sub GR16:$src1, i16immSExt8:$src2),
2002 (SUB16ri8 GR16:$src1, i16immSExt8:$src2)>;
2003 def : Pat<(sub GR32:$src1, i32immSExt8:$src2),
2004 (SUB32ri8 GR32:$src1, i32immSExt8:$src2)>;
2005 def : Pat<(sub GR64:$src1, i64immSExt8:$src2),
2006 (SUB64ri8 GR64:$src1, i64immSExt8:$src2)>;
2007 def : Pat<(sub GR64:$src1, i64immSExt32:$src2),
2008 (SUB64ri32 GR64:$src1, i64immSExt32:$src2)>;
2017 def : Pat<(mul GR16:$src1, GR16:$src2),
2018 (IMUL16rr GR16:$src1, GR16:$src2)>;
2019 def : Pat<(mul GR32:$src1, GR32:$src2),
2020 (IMUL32rr GR32:$src1, GR32:$src2)>;
2021 def : Pat<(mul GR64:$src1, GR64:$src2),
2022 (IMUL64rr GR64:$src1, GR64:$src2)>;
2025 def : Pat<(mul GR16:$src1, (loadi16 addr:$src2)),
2026 (IMUL16rm GR16:$src1, addr:$src2)>;
2027 def : Pat<(mul GR32:$src1, (loadi32 addr:$src2)),
2028 (IMUL32rm GR32:$src1, addr:$src2)>;
2029 def : Pat<(mul GR64:$src1, (loadi64 addr:$src2)),
2030 (IMUL64rm GR64:$src1, addr:$src2)>;
2033 def : Pat<(mul GR16:$src1, imm:$src2),
2034 (IMUL16rri GR16:$src1, imm:$src2)>;
2035 def : Pat<(mul GR32:$src1, imm:$src2),
2036 (IMUL32rri GR32:$src1, imm:$src2)>;
2037 def : Pat<(mul GR16:$src1, i16immSExt8:$src2),
2038 (IMUL16rri8 GR16:$src1, i16immSExt8:$src2)>;
2039 def : Pat<(mul GR32:$src1, i32immSExt8:$src2),
2040 (IMUL32rri8 GR32:$src1, i32immSExt8:$src2)>;
2041 def : Pat<(mul GR64:$src1, i64immSExt8:$src2),
2042 (IMUL64rri8 GR64:$src1, i64immSExt8:$src2)>;
2043 def : Pat<(mul GR64:$src1, i64immSExt32:$src2),
2044 (IMUL64rri32 GR64:$src1, i64immSExt32:$src2)>;
2047 def : Pat<(mul (loadi16 addr:$src1), imm:$src2),
2048 (IMUL16rmi addr:$src1, imm:$src2)>;
2049 def : Pat<(mul (loadi32 addr:$src1), imm:$src2),
2050 (IMUL32rmi addr:$src1, imm:$src2)>;
2051 def : Pat<(mul (loadi16 addr:$src1), i16immSExt8:$src2),
2052 (IMUL16rmi8 addr:$src1, i16immSExt8:$src2)>;
2053 def : Pat<(mul (loadi32 addr:$src1), i32immSExt8:$src2),
2054 (IMUL32rmi8 addr:$src1, i32immSExt8:$src2)>;
2055 def : Pat<(mul (loadi64 addr:$src1), i64immSExt8:$src2),
2056 (IMUL64rmi8 addr:$src1, i64immSExt8:$src2)>;
2057 def : Pat<(mul (loadi64 addr:$src1), i64immSExt32:$src2),
2058 (IMUL64rmi32 addr:$src1, i64immSExt32:$src2)>;
2083 def : Pat<(or GR8 :$src1, GR8 :$src2), (OR8rr GR8 :$src1, GR8 :$src2)>;
2084 def : Pat<(or GR16:$src1, GR16:$src2), (OR16rr GR16:$src1, GR16:$src2)>;
2085 def : Pat<(or GR32:$src1, GR32:$src2), (OR32rr GR32:$src1, GR32:$src2)>;
2086 def : Pat<(or GR64:$src1, GR64:$src2), (OR64rr GR64:$src1, GR64:$src2)>;
2089 def : Pat<(or GR8:$src1, (loadi8 addr:$src2)),
2090 (OR8rm GR8:$src1, addr:$src2)>;
2091 def : Pat<(or GR16:$src1, (loadi16 addr:$src2)),
2092 (OR16rm GR16:$src1, addr:$src2)>;
2093 def : Pat<(or GR32:$src1, (loadi32 addr:$src2)),
2094 (OR32rm GR32:$src1, addr:$src2)>;
2095 def : Pat<(or GR64:$src1, (loadi64 addr:$src2)),
2096 (OR64rm GR64:$src1, addr:$src2)>;
2099 def : Pat<(or GR8:$src1 , imm:$src2), (OR8ri GR8 :$src1, imm:$src2)>;
2100 def : Pat<(or GR16:$src1, imm:$src2), (OR16ri GR16:$src1, imm:$src2)>;
2101 def : Pat<(or GR32:$src1, imm:$src2), (OR32ri GR32:$src1, imm:$src2)>;
2102 def : Pat<(or GR16:$src1, i16immSExt8:$src2),
2103 (OR16ri8 GR16:$src1, i16immSExt8:$src2)>;
2104 def : Pat<(or GR32:$src1, i32immSExt8:$src2),
2105 (OR32ri8 GR32:$src1, i32immSExt8:$src2)>;
2106 def : Pat<(or GR64:$src1, i64immSExt8:$src2),
2107 (OR64ri8 GR64:$src1, i64immSExt8:$src2)>;
2108 def : Pat<(or GR64:$src1, i64immSExt32:$src2),
2109 (OR64ri32 GR64:$src1, i64immSExt32:$src2)>;
2112 def : Pat<(xor GR8 :$src1, GR8 :$src2), (XOR8rr GR8 :$src1, GR8 :$src2)>;
2113 def : Pat<(xor GR16:$src1, GR16:$src2), (XOR16rr GR16:$src1, GR16:$src2)>;
2114 def : Pat<(xor GR32:$src1, GR32:$src2), (XOR32rr GR32:$src1, GR32:$src2)>;
2115 def : Pat<(xor GR64:$src1, GR64:$src2), (XOR64rr GR64:$src1, GR64:$src2)>;
2118 def : Pat<(xor GR8:$src1, (loadi8 addr:$src2)),
2119 (XOR8rm GR8:$src1, addr:$src2)>;
2120 def : Pat<(xor GR16:$src1, (loadi16 addr:$src2)),
2121 (XOR16rm GR16:$src1, addr:$src2)>;
2122 def : Pat<(xor GR32:$src1, (loadi32 addr:$src2)),
2123 (XOR32rm GR32:$src1, addr:$src2)>;
2124 def : Pat<(xor GR64:$src1, (loadi64 addr:$src2)),
2125 (XOR64rm GR64:$src1, addr:$src2)>;
2128 def : Pat<(xor GR8:$src1, imm:$src2),
2129 (XOR8ri GR8:$src1, imm:$src2)>;
2130 def : Pat<(xor GR16:$src1, imm:$src2),
2131 (XOR16ri GR16:$src1, imm:$src2)>;
2132 def : Pat<(xor GR32:$src1, imm:$src2),
2133 (XOR32ri GR32:$src1, imm:$src2)>;
2134 def : Pat<(xor GR16:$src1, i16immSExt8:$src2),
2135 (XOR16ri8 GR16:$src1, i16immSExt8:$src2)>;
2136 def : Pat<(xor GR32:$src1, i32immSExt8:$src2),
2137 (XOR32ri8 GR32:$src1, i32immSExt8:$src2)>;
2138 def : Pat<(xor GR64:$src1, i64immSExt8:$src2),
2139 (XOR64ri8 GR64:$src1, i64immSExt8:$src2)>;
2140 def : Pat<(xor GR64:$src1, i64immSExt32:$src2),
2141 (XOR64ri32 GR64:$src1, i64immSExt32:$src2)>;
2144 def : Pat<(and GR8 :$src1, GR8 :$src2), (AND8rr GR8 :$src1, GR8 :$src2)>;
2145 def : Pat<(and GR16:$src1, GR16:$src2), (AND16rr GR16:$src1, GR16:$src2)>;
2146 def : Pat<(and GR32:$src1, GR32:$src2), (AND32rr GR32:$src1, GR32:$src2)>;
2147 def : Pat<(and GR64:$src1, GR64:$src2), (AND64rr GR64:$src1, GR64:$src2)>;
2150 def : Pat<(and GR8:$src1, (loadi8 addr:$src2)),
2151 (AND8rm GR8:$src1, addr:$src2)>;
2152 def : Pat<(and GR16:$src1, (loadi16 addr:$src2)),
2153 (AND16rm GR16:$src1, addr:$src2)>;
2154 def : Pat<(and GR32:$src1, (loadi32 addr:$src2)),
2155 (AND32rm GR32:$src1, addr:$src2)>;
2156 def : Pat<(and GR64:$src1, (loadi64 addr:$src2)),
2157 (AND64rm GR64:$src1, addr:$src2)>;
2160 def : Pat<(and GR8:$src1, imm:$src2),
2161 (AND8ri GR8:$src1, imm:$src2)>;
2162 def : Pat<(and GR16:$src1, imm:$src2),
2163 (AND16ri GR16:$src1, imm:$src2)>;
2164 def : Pat<(and GR32:$src1, imm:$src2),
2165 (AND32ri GR32:$src1, imm:$src2)>;
2166 def : Pat<(and GR16:$src1, i16immSExt8:$src2),
2167 (AND16ri8 GR16:$src1, i16immSExt8:$src2)>;
2168 def : Pat<(and GR32:$src1, i32immSExt8:$src2),
2169 (AND32ri8 GR32:$src1, i32immSExt8:$src2)>;
2170 def : Pat<(and GR64:$src1, i64immSExt8:$src2),
2171 (AND64ri8 GR64:$src1, i64immSExt8:$src2)>;
2172 def : Pat<(and GR64:$src1, i64immSExt32:$src2),
2173 (AND64ri32 GR64:$src1, i64immSExt32:$src2)>;