Lines Matching defs:RC

330 bool HexagonBitSimplify::isZero(const BitTracker::RegisterCell &RC,  in isZero()
339 bool HexagonBitSimplify::getConst(const BitTracker::RegisterCell &RC, in getConst()
409 const TargetRegisterClass *RC = MRI.getRegClass(RR.Reg); in getSubregMask() local
901 auto *RC = MRI.getRegClass(RR.Reg); in getFinalVRegClass() local
907 auto VerifySR = [&HRI] (const TargetRegisterClass *RC, unsigned Sub) -> void { in getFinalVRegClass()
1262 const TargetRegisterClass *RC = HBS::getFinalVRegClass(RR, MRI); in computeUsedBits() local
1413 Register ConstGeneration::genTfrConst(const TargetRegisterClass *RC, int64_t C, in genTfrConst()
1559 const BitTracker::RegisterCell &RC = BT.lookup(R); in findMatch() local
1696 const TargetRegisterClass &RC = *MRI.getRegClass(RD.Reg); in propagateRegCopy() local
1706 const TargetRegisterClass &RC = *MRI.getRegClass(RD.Reg); in propagateRegCopy() local
1807 const BitTracker::RegisterCell &RC, unsigned B, RegHalf &RH) { in matchHalf()
1894 const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs, in matchPackhl()
1933 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreUpperHalf() local
1978 const BitTracker::RegisterCell &RC = BT.lookup(RS.Reg); in genStoreImmediate() local
2024 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genPackhl()
2051 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractHalf()
2090 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genCombineHalf()
2122 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractLow()
2182 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in genBitSplit()
2335 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in simplifyTstbit()
2395 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in simplifyExtractLow()
2740 const BitTracker::RegisterCell &RC = BT.lookup(RD.Reg); in processBlock() local
2980 const BitTracker::RegisterCell &RC = BTP->lookup(Reg); in isConst() local
3093 const TargetRegisterClass *RC = MRI->getRegClass(DR); in moveGroup() local
3293 const TargetRegisterClass *RC = MRI->getRegClass(G.Inp.Reg); in processLoop() local