Lines Matching refs:src3

1196           (ins addrmode6:$Rn, DPR:$src1, DPR:$src2, DPR:$src3,
1199 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3", []>, Sched<[WriteVLD2]> {
1234 DPR:$src1, DPR:$src2, DPR:$src3, nohash_imm:$lane),
1237 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $Rn.addr = $wb",
1270 (ins addrmode6:$Rn, DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4,
1273 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4", []>,
1312 DPR:$src1, DPR:$src2, DPR:$src3, DPR:$src4, nohash_imm:$lane),
1315 "$src1 = $Vd, $src2 = $dst2, $src3 = $dst3, $src4 = $dst4, $Rn.addr = $wb",
1974 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3), IIC_VST3,
1975 "vst3", Dt, "\\{$Vd, $src2, $src3\\}, $Rn", "", []>, Sched<[WriteVST3]> {
1993 DPR:$Vd, DPR:$src2, DPR:$src3), IIC_VST3u,
1994 "vst3", Dt, "\\{$Vd, $src2, $src3\\}, $Rn$Rm",
2032 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4),
2033 IIC_VST4, "vst4", Dt, "\\{$Vd, $src2, $src3, $src4\\}, $Rn",
2052 DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4), IIC_VST4u,
2053 "vst4", Dt, "\\{$Vd, $src2, $src3, $src4\\}, $Rn$Rm",
2279 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3,
2281 "\\{$Vd[$lane], $src2[$lane], $src3[$lane]\\}, $Rn", "", []>,
2316 DPR:$Vd, DPR:$src2, DPR:$src3, nohash_imm:$lane),
2318 "\\{$Vd[$lane], $src2[$lane], $src3[$lane]\\}, $Rn$Rm",
2350 (ins addrmode6:$Rn, DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4,
2352 "\\{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\\}, $Rn",
2390 DPR:$Vd, DPR:$src2, DPR:$src3, DPR:$src4, nohash_imm:$lane),
2392 "\\{$Vd[$lane], $src2[$lane], $src3[$lane], $src4[$lane]\\}, $Rn$Rm",
4444 (v8i16 (ARMvduplane (v8i16 QPR:$src3), imm:$lane))))),
4446 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4452 (v4i32 (ARMvduplane (v4i32 QPR:$src3), imm:$lane))))),
4454 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4461 (v4f32 (ARMvduplane (v4f32 QPR:$src3), imm:$lane))))),
4464 (v2f32 (EXTRACT_SUBREG QPR:$src3,
4529 (v8i16 (ARMvduplane (v8i16 QPR:$src3),
4534 QPR:$src3,
4541 (v4i32 (ARMvduplane (v4i32 QPR:$src3),
4546 QPR:$src3,
4598 (v8i16 (ARMvduplane (v8i16 QPR:$src3),
4603 QPR:$src3,
4610 (v4i32 (ARMvduplane (v4i32 QPR:$src3),
4615 QPR:$src3,
4678 (v8i16 (ARMvduplane (v8i16 QPR:$src3), imm:$lane))))),
4680 (v4i16 (EXTRACT_SUBREG QPR:$src3,
4686 (v4i32 (ARMvduplane (v4i32 QPR:$src3), imm:$lane))))),
4688 (v2i32 (EXTRACT_SUBREG QPR:$src3,
4695 (v4f32 (ARMvduplane (v4f32 QPR:$src3), imm:$lane))))),
4697 (v2f32 (EXTRACT_SUBREG QPR:$src3,
5534 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
5547 // like VBSL but with: "vbit $dst, $src2, $src1", "$src3 = $dst",
6500 def : Pat<(v2f32 (insertelt DPR:$src1, SPR:$src2, imm:$src3)),
6502 SPR:$src2, (SSubReg_f32_reg imm:$src3))>;
6503 def : Pat<(v4f32 (insertelt QPR:$src1, SPR:$src2, imm:$src3)),
6505 SPR:$src2, (SSubReg_f32_reg imm:$src3))>;
6509 def : Pat<(v2f64 (insertelt QPR:$src1, DPR:$src2, imm:$src3)),
6510 (INSERT_SUBREG QPR:$src1, DPR:$src2, (DSubReg_f64_reg imm:$src3))>;