Lines Matching refs:AMDGPU

441   case AMDGPU::EXEC:  in markOperand()
442 case AMDGPU::EXEC_LO: in markOperand()
464 markDefs(MI, LR, *RegUnit, AMDGPU::NoSubRegister, Flag, Worklist); in markOperand()
516 } else if (Opcode == AMDGPU::WQM) { in scanInstructions()
521 } else if (Opcode == AMDGPU::SOFT_WQM) { in scanInstructions()
525 } else if (Opcode == AMDGPU::STRICT_WWM) { in scanInstructions()
533 } else if (Opcode == AMDGPU::STRICT_WQM) { in scanInstructions()
541 } else if (Opcode == AMDGPU::V_SET_INACTIVE_B32 || in scanInstructions()
542 Opcode == AMDGPU::V_SET_INACTIVE_B64) { in scanInstructions()
564 if (Opcode == AMDGPU::SI_PS_LIVE || Opcode == AMDGPU::SI_LIVE_MASK) { in scanInstructions()
566 } else if (Opcode == AMDGPU::SI_KILL_I1_TERMINATOR || in scanInstructions()
567 Opcode == AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR || in scanInstructions()
568 Opcode == AMDGPU::SI_DEMOTE_I1) { in scanInstructions()
718 Register SaveReg = MRI->createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in saveSCC()
721 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), SaveReg) in saveSCC()
722 .addReg(AMDGPU::SCC); in saveSCC()
724 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), AMDGPU::SCC) in saveSCC()
746 case AMDGPU::S_AND_B32: in splitBlock()
747 NewOpcode = AMDGPU::S_AND_B32_term; in splitBlock()
749 case AMDGPU::S_AND_B64: in splitBlock()
750 NewOpcode = AMDGPU::S_AND_B64_term; in splitBlock()
752 case AMDGPU::S_MOV_B32: in splitBlock()
753 NewOpcode = AMDGPU::S_MOV_B32_term; in splitBlock()
755 case AMDGPU::S_MOV_B64: in splitBlock()
756 NewOpcode = AMDGPU::S_MOV_B64_term; in splitBlock()
780 BuildMI(*BB, BB->end(), DebugLoc(), TII->get(AMDGPU::S_BRANCH)) in splitBlock()
804 Opcode = AMDGPU::V_CMP_LG_F32_e64; in lowerKillF32()
807 Opcode = AMDGPU::V_CMP_GE_F32_e64; in lowerKillF32()
810 Opcode = AMDGPU::V_CMP_GT_F32_e64; in lowerKillF32()
813 Opcode = AMDGPU::V_CMP_LE_F32_e64; in lowerKillF32()
816 Opcode = AMDGPU::V_CMP_LT_F32_e64; in lowerKillF32()
819 Opcode = AMDGPU::V_CMP_EQ_F32_e64; in lowerKillF32()
822 Opcode = AMDGPU::V_CMP_O_F32_e64; in lowerKillF32()
825 Opcode = AMDGPU::V_CMP_U_F32_e64; in lowerKillF32()
829 Opcode = AMDGPU::V_CMP_NEQ_F32_e64; in lowerKillF32()
833 Opcode = AMDGPU::V_CMP_NLT_F32_e64; in lowerKillF32()
837 Opcode = AMDGPU::V_CMP_NLE_F32_e64; in lowerKillF32()
841 Opcode = AMDGPU::V_CMP_NGT_F32_e64; in lowerKillF32()
845 Opcode = AMDGPU::V_CMP_NGE_F32_e64; in lowerKillF32()
849 Opcode = AMDGPU::V_CMP_NLG_F32_e64; in lowerKillF32()
860 Opcode = AMDGPU::getVOPe32(Opcode); in lowerKillF32()
864 .addReg(AMDGPU::VCC, RegState::Define) in lowerKillF32()
873 Register VCC = ST->isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC; in lowerKillF32()
883 BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_EARLY_TERMINATE_SCC0)); in lowerKillF32()
889 MachineInstr *NewTerm = BuildMI(MBB, MI, DL, TII->get(AMDGPU::S_BRANCH)) in lowerKillF32()
909 const bool IsDemote = IsWQM && (MI.getOpcode() == AMDGPU::SI_DEMOTE_I1); in lowerKillI1()
926 if (MI.getOpcode() == AMDGPU::SI_DEMOTE_I1) { in lowerKillI1()
930 NewTerm = BuildMI(MBB, MI, DL, TII->get(AMDGPU::S_BRANCH)) in lowerKillI1()
958 BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_EARLY_TERMINATE_SCC0)); in lowerKillI1()
976 unsigned MovOpc = ST->isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in lowerKillI1()
1042 case AMDGPU::SI_DEMOTE_I1: in lowerBlock()
1043 case AMDGPU::SI_KILL_I1_TERMINATOR: in lowerBlock()
1046 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR: in lowerBlock()
1077 LIS->getRegUnit(*MCRegUnitIterator(MCRegister::from(AMDGPU::SCC), TRI)); in prepareInsertion()
1126 MO.getReg() == AMDGPU::EXEC_LO || MO.getReg() == AMDGPU::EXEC; in prepareInsertion()
1165 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), Exec) in toWQM()
1184 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WWM), in toStrictMode()
1188 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WQM), in toStrictMode()
1207 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WWM), in fromStrictMode()
1211 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WQM), in fromStrictMode()
1246 if (II != IE && II->getOpcode() == AMDGPU::COPY) in processBlock()
1415 BuildMI(*MI->getParent(), MI, DL, TII->get(AMDGPU::COPY), Dest) in lowerLiveMaskQueries()
1442 return MO.isUse() && MO.getReg() == AMDGPU::EXEC; in lowerCopyInstrs()
1453 int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
1456 Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC); in lowerCopyInstrs()
1458 MI->setDesc(TII->get(AMDGPU::COPY)); in lowerCopyInstrs()
1463 if (MI->getOpcode() == AMDGPU::V_SET_INACTIVE_B32 || in lowerCopyInstrs()
1464 MI->getOpcode() == AMDGPU::V_SET_INACTIVE_B64) { in lowerCopyInstrs()
1476 MI->setDesc(TII->get(AMDGPU::COPY)); in lowerCopyInstrs()
1485 case AMDGPU::SI_DEMOTE_I1: in lowerKillInstrs()
1486 case AMDGPU::SI_KILL_I1_TERMINATOR: in lowerKillInstrs()
1489 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR: in lowerKillInstrs()
1523 AndOpc = AMDGPU::S_AND_B32; in runOnMachineFunction()
1524 AndN2Opc = AMDGPU::S_ANDN2_B32; in runOnMachineFunction()
1525 XorOpc = AMDGPU::S_XOR_B32; in runOnMachineFunction()
1526 AndSaveExecOpc = AMDGPU::S_AND_SAVEEXEC_B32; in runOnMachineFunction()
1527 OrSaveExecOpc = AMDGPU::S_OR_SAVEEXEC_B32; in runOnMachineFunction()
1528 WQMOpc = AMDGPU::S_WQM_B32; in runOnMachineFunction()
1529 Exec = AMDGPU::EXEC_LO; in runOnMachineFunction()
1531 AndOpc = AMDGPU::S_AND_B64; in runOnMachineFunction()
1532 AndN2Opc = AMDGPU::S_ANDN2_B64; in runOnMachineFunction()
1533 XorOpc = AMDGPU::S_XOR_B64; in runOnMachineFunction()
1534 AndSaveExecOpc = AMDGPU::S_AND_SAVEEXEC_B64; in runOnMachineFunction()
1535 OrSaveExecOpc = AMDGPU::S_OR_SAVEEXEC_B64; in runOnMachineFunction()
1536 WQMOpc = AMDGPU::S_WQM_B64; in runOnMachineFunction()
1537 Exec = AMDGPU::EXEC; in runOnMachineFunction()
1559 BuildMI(Entry, EntryMI, DebugLoc(), TII->get(AMDGPU::COPY), LiveMaskReg) in runOnMachineFunction()
1590 LIS->removeRegUnit(*MCRegUnitIterator(MCRegister::from(AMDGPU::SCC), TRI)); in runOnMachineFunction()
1594 LIS->removeRegUnit(*MCRegUnitIterator(AMDGPU::EXEC, TRI)); in runOnMachineFunction()