169 	u32_t data, base0 = base[0];  in dev_real_reset()  local
181 	u32_t mac_ctrl, physet, mode0, mode1, base0 = base[0];  in dev_init_io()  local
218 	u32_t status, base0 = base[0];  in dev_init_mii()  local
263 	u32_t base0 = base[0];  in dev_intr_control()  local
272 	u32_t data, base0 = base[0];  in dev_rx_tx_control()  local
284 	u32_t i, sta_addr[3], base0 = base[0];  in dev_get_addr()  local
300 	u32_t phy_ctrl, mac_ctrl, base0 = base[0];  in dev_check_link()  local
339 	u32_t data, base0 = base[0];  in dev_set_rec_mode()  local
354 	u32_t base0 = base[0];  in dev_start_tx()  local
360 	u32_t data, base0 = base[0];  in dev_read_clear_intr_status()  local
395 	u32_t base0 = base[0];  in dev_set_desc_reg()  local