Lines Matching defs:const

76                                              int &FrameIndex) const {  in isLoadFromStackSlot()
103 int &FrameIndex) const { in isStoreToStackSlot()
125 DebugLoc DL) const{ in InsertBranch()
179 bool AllowModify) const { in AnalyzeBranch()
310 unsigned HexagonInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { in RemoveBranch()
344 int &Mask, int &Value) const { in analyzeCompare()
419 bool KillSrc) const { in copyPhysReg()
476 const TargetRegisterInfo *TRI) const { in storeRegToStackSlot() argument
513 SmallVectorImpl<MachineInstr*> &NewMIs) const in storeRegToAddr()
523 const TargetRegisterInfo *TRI) const { in loadRegFromStackSlot() argument
553 SmallVectorImpl<MachineInstr*> &NewMIs) const { in loadRegFromAddr()
561 int FI) const { in foldMemoryOperandImpl()
566 unsigned HexagonInstrInfo::createVR(MachineFunction* MF, MVT VT) const { in createVR()
584 bool HexagonInstrInfo::isExtendable(const MachineInstr *MI) const { in isExtendable() argument
609 bool HexagonInstrInfo::isExtended(const MachineInstr *MI) const { in isExtended() argument
624 bool HexagonInstrInfo::isBranch (const MachineInstr *MI) const { in isBranch() argument
628 bool HexagonInstrInfo::isNewValueInst(const MachineInstr *MI) const { in isNewValueInst() argument
638 bool HexagonInstrInfo::isSaveCalleeSavedRegsCall(const MachineInstr *MI) const { in isSaveCalleeSavedRegsCall() argument
642 bool HexagonInstrInfo::isPredicable(MachineInstr *MI) const { in isPredicable()
723 unsigned HexagonInstrInfo::getInvertedPredicatedOpcode(const int Opc) const { in getInvertedPredicatedOpcode() argument
746 bool HexagonInstrInfo::isNewValueStore(const MachineInstr *MI) const { in isNewValueStore() argument
752 bool HexagonInstrInfo::isNewValueStore(unsigned Opcode) const { in isNewValueStore()
759 getMatchingCondBranchOpcode(int Opc, bool invertPredicate) const { in getMatchingCondBranchOpcode()
796 const SmallVectorImpl<MachineOperand> &Cond) const { in PredicateInstruction() argument
949 const BranchProbability &Probability) const { in isProfitableToIfCvt() argument
962 const BranchProbability &Probability) const { in isProfitableToIfCvt() argument
972 bool HexagonInstrInfo::isPredicated(const MachineInstr *MI) const { in isPredicated() argument
978 bool HexagonInstrInfo::isPredicated(unsigned Opcode) const { in isPredicated()
984 bool HexagonInstrInfo::isPredicatedTrue(const MachineInstr *MI) const { in isPredicatedTrue() argument
992 bool HexagonInstrInfo::isPredicatedTrue(unsigned Opcode) const { in isPredicatedTrue()
1001 bool HexagonInstrInfo::isPredicatedNew(const MachineInstr *MI) const { in isPredicatedNew() argument
1008 bool HexagonInstrInfo::isPredicatedNew(unsigned Opcode) const { in isPredicatedNew()
1016 bool HexagonInstrInfo::mayBeNewStore(const MachineInstr *MI) const { in mayBeNewStore() argument
1027 std::vector<MachineOperand> &Pred) const { in DefinesPredicate()
1045 const SmallVectorImpl<MachineOperand> &Pred2) const { in SubsumesPredicate() argument
1056 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { in ReverseBranchCondition()
1068 const BranchProbability &Probability) const { in isProfitableToDupForIfCvt() argument
1072 bool HexagonInstrInfo::isDeallocRet(const MachineInstr *MI) const { in isDeallocRet() argument
1088 isValidOffset(const int Opcode, const int Offset) const { in isValidOffset() argument
1178 isValidAutoIncImm(const EVT VT, const int Offset) const { in isValidAutoIncImm() argument
1204 isMemOp(const MachineInstr *MI) const { in isMemOp() argument
1241 isSpillPredRegOp(const MachineInstr *MI) const { in isSpillPredRegOp() argument
1250 bool HexagonInstrInfo::isNewValueJumpCandidate(const MachineInstr *MI) const { in isNewValueJumpCandidate() argument
1264 isConditionalTransfer (const MachineInstr *MI) const { in isConditionalTransfer() argument
1279 bool HexagonInstrInfo::isConditionalALU32 (const MachineInstr* MI) const { in isConditionalALU32() argument
1336 isConditionalLoad (const MachineInstr* MI) const { in isConditionalLoad() argument
1418 isConditionalStore (const MachineInstr* MI) const { in isConditionalStore() argument
1497 bool HexagonInstrInfo::isNewValueJump(const MachineInstr *MI) const { in isNewValueJump() argument
1503 bool HexagonInstrInfo::isPostIncrement (const MachineInstr* MI) const { in isPostIncrement() argument
1507 bool HexagonInstrInfo::isNewValue(const MachineInstr* MI) const { in isNewValue() argument
1514 bool HexagonInstrInfo::isDotNewInst (const MachineInstr* MI) const { in isDotNewInst() argument
1528 int HexagonInstrInfo::GetDotOldOp(const int opc) const { in GetDotOldOp() argument
1544 int HexagonInstrInfo::GetDotNewOp(const MachineInstr* MI) const { in GetDotNewOp() argument
1574 *MBPI) const { in GetDotNewPredOp()
1609 unsigned HexagonInstrInfo::getAddrMode(const MachineInstr* MI) const { in getAddrMode() argument
1617 void HexagonInstrInfo::immediateExtend(MachineInstr *MI) const { in immediateExtend()
1631 const TargetSubtargetInfo &STI) const { in CreateTargetScheduleState() argument
1638 const MachineFunction &MF) const { in isSchedulingBoundary() argument
1655 bool HexagonInstrInfo::isConstExtended(MachineInstr *MI) const { in isConstExtended()
1708 MachineBranchProbabilityInfo *MBPI) const { in getDotNewPredJumpOp()
1732 unsigned short OperandNum) const { in isOperandExtended()
1744 unsigned short HexagonInstrInfo::getCExtOpNum(const MachineInstr *MI) const { in getCExtOpNum() argument
1750 int HexagonInstrInfo::getMinValue(const MachineInstr *MI) const { in getMinValue() argument
1764 int HexagonInstrInfo::getMaxValue(const MachineInstr *MI) const { in getMaxValue() argument
1779 bool HexagonInstrInfo::NonExtEquivalentExists (const MachineInstr *MI) const { in NonExtEquivalentExists() argument
1813 short HexagonInstrInfo::getNonExtOpcode (const MachineInstr *MI) const { in getNonExtOpcode() argument
1835 bool HexagonInstrInfo::PredOpcodeHasJMP_c(Opcode_t Opcode) const { in PredOpcodeHasJMP_c()
1844 bool HexagonInstrInfo::PredOpcodeHasNot(Opcode_t Opcode) const { in PredOpcodeHasNot()