Lines Matching defs:enableRT
472 SparseTensorType cTp, bool enableRT,
482 return enableRT ? CuSparseFormat::kCOO : CuSparseFormat::kNone;
495 CuSparseFormat format, bool enableRT) {
498 if (enableRT)
508 CuSparseFormat format, bool enableRT) {
510 if (isCOO && !enableRT)
521 CuSparseFormat format, bool enableRT) {
524 if (enableRT) {
563 linalg::GenericOp op, bool enableRT) {
574 auto format = getCuSparseFormat(aTp, xTp, yTp, enableRT, /*isMatVec=*/true);
585 Value memR = genFirstPosOrCrds(rewriter, loc, a, format, enableRT);
586 Value memC = genSecondCrds(rewriter, loc, a, format, enableRT); // or empty
606 nseA, rowA, colA, valA, format, enableRT);
660 linalg::GenericOp op, bool enableRT) {
671 auto format = getCuSparseFormat(aTp, bTp, cTp, enableRT, /*isMatVec=*/false);
683 Value memR = genFirstPosOrCrds(rewriter, loc, a, format, enableRT);
684 Value memC = genSecondCrds(rewriter, loc, a, format, enableRT); // or empty
704 nseA, rowA, colA, valA, format, enableRT);
761 linalg::GenericOp op, bool enableRT) {
786 Value amemR = genFirstPosOrCrds(rewriter, loc, a, format, enableRT);
787 Value amemC = genSecondCrds(rewriter, loc, a, format, enableRT); // not empty
789 Value bmemR = genFirstPosOrCrds(rewriter, loc, b, format, enableRT);
790 Value bmemC = genSecondCrds(rewriter, loc, b, format, enableRT); // not empty
809 nseA, rowA, colA, valA, format, enableRT);
814 nseB, rowB, colB, valB, format, enableRT);
833 zero, rowC, colC, valC, format, enableRT);
1053 linalg::GenericOp op, bool enableRT) {
1064 auto format = getCuSparseFormat(cTp, bTp, aTp, enableRT, /*isMatVec=*/false);
1082 Value memR = genFirstPosOrCrds(rewriter, loc, c, format, enableRT);
1083 Value memC = genSecondCrds(rewriter, loc, c, format, enableRT); // or empty
1107 nseC, rowC, colC, valC, format, enableRT);
1253 : OpRewritePattern(context), enableRT(rt) {}
1280 return rewriteSpMV(rewriter, op, enableRT);
1290 return rewriteSpGEMM(rewriter, op, enableRT);
1293 return rewriteSpMM(rewriter, op, enableRT);
1303 return rewriteSDDMM(rewriter, op, enableRT);
1310 bool enableRT;
1331 bool enableRT) {
1332 patterns.add<LinalgOpRewriter>(patterns.getContext(), enableRT);