Lines Matching defs:operands
141 mlir::Operation::operand_range operands,
149 return getValuesFromSegments(deviceTypeAttr, operands, segments,
157 mlir::Operation::operand_range operands,
162 getValuesFromSegments(deviceTypeAttr, operands, segments, deviceType);
188 // the attribute and operands cannot appear at the same time.
692 /// using the operands of the block terminator to replace operation results.
843 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
849 parser.parseOperand(operands.emplace_back()) ||
862 mlir::OperandRange operands,
865 llvm::interleaveComma(llvm::zip(*attributes, operands), p, [&](auto it) {
878 const mlir::ValueRange &operands) {
879 for (mlir::Value operand : operands)
893 mlir::OperandRange operands, llvm::StringRef operandName,
895 if (!operands.empty()) {
896 if (!attributes || attributes->size() != operands.size())
899 << operandName << " operands";
908 for (auto args : llvm::zip(operands, *attributes)) {
948 static LogicalResult verifyDeviceTypeCountMatch(Op op, OperandRange operands,
951 if (!operands.empty() && deviceTypes.getValue().size() != operands.size())
952 return op.emitOpError() << keyword << " operands count must match "
959 Op op, OperandRange operands, DenseI32ArrayAttr segments,
974 if ((numOperandsInSegments != operands.size()) ||
975 (!deviceTypes && !operands.empty()))
1143 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1153 int32_t crtOperandsSize = operands.size();
1156 if (parser.parseOperand(operands.emplace_back()) ||
1162 seg.push_back(operands.size() - crtOperandsSize);
1192 mlir::OperandRange operands, mlir::TypeRange types,
1200 p << operands[opIdx] << " : " << operands[opIdx].getType();
1210 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1220 int32_t crtOperandsSize = operands.size();
1224 if (parser.parseOperand(operands.emplace_back()) ||
1231 seg.push_back(operands.size() - crtOperandsSize);
1255 mlir::OpAsmPrinter &p, mlir::Operation *op, mlir::OperandRange operands,
1263 p << operands[opIdx] << " : " << operands[opIdx].getType();
1273 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1310 int32_t crtOperandsSize = operands.size();
1322 if (parser.parseOperand(operands.emplace_back()) ||
1329 seg.push_back(operands.size() - crtOperandsSize);
1367 mlir::OperandRange operands, mlir::TypeRange types,
1373 if (operands.begin() == operands.end() && hasOnlyDeviceTypeNone(keywordOnly))
1390 p << operands[opIdx] << " : " << operands[opIdx].getType();
1402 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1406 if (parser.parseOperand(operands.emplace_back()) ||
1428 mlir::OperandRange operands, mlir::TypeRange types,
1432 llvm::interleaveComma(llvm::zip(*deviceTypes, operands), p, [&](auto it) {
1440 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1476 if (parser.parseOperand(operands.emplace_back()) ||
1501 mlir::OpAsmPrinter &p, mlir::Operation *op, mlir::OperandRange operands,
1505 if (operands.begin() == operands.end() &&
1515 printDeviceTypeOperands(p, op, operands, types, deviceTypes);
1808 llvm::SmallVectorImpl<mlir::OpAsmParser::UnresolvedOperand> &operands,
1815 if (parser.parseOperand(operands.emplace_back()) ||
1953 mlir::OperandRange operands, mlir::TypeRange types,
1959 if (operands.begin() == operands.end() &&
1987 p << "=" << operands[opIdx] << " : " << operands[opIdx].getType();
2050 << " when gang operands are present";
2426 // attribute and operands cannot appear at the same time.
2470 // attribute and operands cannot appear at the same time.
2566 checkDeclareOperands(Op &op, const mlir::ValueRange &operands,
2568 if (operands.empty() && requireAtLeastOneOperand)
2573 for (mlir::Value operand : operands) {
2583 assert(varPtr && "declare operands can only be data entry operations which "
2588 "declare operands can only be data entry operations which must have "