Lines Matching defs:Int32VT
103 auto Int32VT = EVT::getIntegerVT(Context, 32);
105 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
107 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
112 EXPECT_TRUE(sd_match(Op0, m_SpecificVT(Int32VT)));
124 auto Int32VT = EVT::getIntegerVT(Context, 32);
125 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
151 auto Int32VT = EVT::getIntegerVT(Context, 32);
153 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
154 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
155 SDValue Op3 = DAG->getConstant(1, DL, Int32VT);
167 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
168 auto SmallVInt32VT = EVT::getVectorVT(Context, Int32VT, 2);
179 DAG->getNode(ISD::EXTRACT_VECTOR_ELT, DL, Int32VT, V1, Op3);
237 auto Int32VT = EVT::getIntegerVT(Context, 32);
239 auto BigVInt32VT = EVT::getVectorVT(Context, Int32VT, 8);
240 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
246 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
247 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
249 SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 8, Int32VT);
250 SDValue Op4 = DAG->getConstant(1, DL, Int32VT);
252 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
253 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
254 SDValue Mul = DAG->getNode(ISD::MUL, DL, Int32VT, Add, Sub);
255 SDValue And = DAG->getNode(ISD::AND, DL, Int32VT, Op0, Op1);
256 SDValue Xor = DAG->getNode(ISD::XOR, DL, Int32VT, Op1, Op0);
257 SDValue Or = DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op1);
259 DAG->getNode(ISD::OR, DL, Int32VT, Op0, Op3, SDNodeFlags::Disjoint);
260 SDValue SMax = DAG->getNode(ISD::SMAX, DL, Int32VT, Op0, Op1);
261 SDValue SMin = DAG->getNode(ISD::SMIN, DL, Int32VT, Op1, Op0);
262 SDValue UMax = DAG->getNode(ISD::UMAX, DL, Int32VT, Op0, Op1);
263 SDValue UMin = DAG->getNode(ISD::UMIN, DL, Int32VT, Op1, Op0);
264 SDValue Rotl = DAG->getNode(ISD::ROTL, DL, Int32VT, Op0, Op1);
265 SDValue Rotr = DAG->getNode(ISD::ROTR, DL, Int32VT, Op1, Op0);
371 auto Int32VT = EVT::getIntegerVT(Context, 32);
375 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
378 SDValue Op3 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT);
384 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
386 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Trunc, Op0);
387 SDValue Neg = DAG->getNegative(Op0, DL, Int32VT);
388 SDValue Not = DAG->getNOT(DL, Op0, Int32VT);
390 SDValue VScale = DAG->getVScale(DL, Int32VT, APInt::getMaxValue(32));
396 SDValue Brev = DAG->getNode(ISD::BITREVERSE, DL, Int32VT, Op0);
397 SDValue Bswap = DAG->getNode(ISD::BSWAP, DL, Int32VT, Op0);
399 SDValue Ctpop = DAG->getNode(ISD::CTPOP, DL, Int32VT, Op0);
400 SDValue Ctlz = DAG->getNode(ISD::CTLZ, DL, Int32VT, Op0);
401 SDValue Cttz = DAG->getNode(ISD::CTTZ, DL, Int32VT, Op0);
446 auto Int32VT = EVT::getIntegerVT(Context, 32);
447 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
449 SDValue Arg0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
451 SDValue Const3 = DAG->getConstant(3, DL, Int32VT);
452 SDValue Const87 = DAG->getConstant(87, DL, Int32VT);
455 SDValue Zero = DAG->getConstant(0, DL, Int32VT);
456 SDValue One = DAG->getConstant(1, DL, Int32VT);
457 SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT);
458 SDValue SetCC = DAG->getSetCC(DL, Int32VT, Arg0, Const3, ISD::SETULT);
483 SDValue UndefInt32VT = DAG->getUNDEF(Int32VT);
491 auto Int32VT = EVT::getIntegerVT(Context, 32);
493 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
494 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
496 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
497 SDValue Sub = DAG->getNode(ISD::SUB, DL, Int32VT, Add, Op0);
508 auto Int32VT = EVT::getIntegerVT(Context, 32);
511 SDValue Op32 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
516 SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op64);
540 auto Int32VT = EVT::getIntegerVT(Context, 32);
542 SDValue Op0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
543 SDValue Op1 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 2, Int32VT);
545 SDValue Add = DAG->getNode(ISD::ADD, DL, Int32VT, Op0, Op1);
576 auto Int32VT = EVT::getIntegerVT(Context, 32);
577 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
580 SDValue Scalar0 = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 1, Int32VT);
586 SDValue VPReduceAdd = DAG->getNode(ISD::VP_REDUCE_ADD, DL, Int32VT,
621 auto Int32VT = EVT::getIntegerVT(Context, 32);
622 auto VInt32VT = EVT::getVectorVT(Context, Int32VT, 4);
627 SDValue EL = DAG->getCopyFromReg(DAG->getEntryNode(), DL, 3, Int32VT);