Lines Matching defs:s16
21 LLT s16{LLT::scalar(16)};
23 auto MIBInput = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[0]});
24 auto MIBInput1 = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[1]});
25 auto MIBAdd = B.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
33 Register AddReg = MRI->createGenericVirtualRegister(s16);
38 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
41 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
44 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput1});
254 auto ExtractMIB = CSEB.buildInstr(TargetOpcode::G_EXTRACT, {s16},
256 auto ExtractMIB1 = CSEB.buildInstr(TargetOpcode::G_EXTRACT, {s16},
258 auto ExtractMIB2 = CSEB.buildInstr(TargetOpcode::G_EXTRACT, {s16},
264 auto SextInRegMIB = CSEB.buildSExtInReg(s16, Copies[0], 0);
265 auto SextInRegMIB1 = CSEB.buildSExtInReg(s16, Copies[0], 0);
266 auto SextInRegMIB2 = CSEB.buildSExtInReg(s16, Copies[0], 1);
276 LLT s16{LLT::scalar(16)};
277 auto MIBInput = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[0]});
278 auto MIBAdd = B.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
279 auto MIBZero = B.buildConstant(s16, 0);
287 CSEB.buildInstr(TargetOpcode::G_ADD, {s16}, {MIBInput, MIBInput});
292 auto MIBZeroTmp = CSEB.buildConstant(s16, 0);
296 auto Undef0 = CSEB.buildUndef(s16);
297 auto Undef1 = CSEB.buildUndef(s16);