Lines Matching defs:Op

149   for (auto &Op : Operands)
150 if (Op.isExplicit() && !Op.isTied()) {
153 Op.VariableIndex = VariableIndex;
158 for (auto &Op : Operands)
159 if (Op.isExplicit() && Op.isTied())
160 Op.VariableIndex = Operands[Op.getTiedToIndex()].getVariableIndex();
162 for (auto &Op : Operands)
163 if (Op.isVariable())
164 Variables[Op.getVariableIndex()].TiedOperands.push_back(Op.getIndex());
172 for (const auto &Op : Operands) {
173 if (Op.isReg()) {
174 const auto &AliasingBits = Op.getRegisterAliasing().aliasedBits();
175 if (Op.isDef())
177 if (Op.isUse())
179 if (Op.isDef() && Op.isImplicit())
181 if (Op.isUse() && Op.isImplicit())
183 if (Op.isUse() && !Op.isMemory())
204 return any_of(Operands, [](const Operand &Op) {
205 return Op.isReg() && Op.isExplicit() && Op.isMemory();
263 for (const auto &Op : Operands) {
264 Stream << "- Op" << Op.getIndex();
265 if (Op.isExplicit())
267 if (Op.isImplicit())
269 if (Op.isUse())
271 if (Op.isDef())
273 if (Op.isImmediate())
275 if (Op.isMemory())
277 if (Op.isReg()) {
278 if (Op.isImplicitReg())
279 Stream << " Reg(" << RegInfo.getName(Op.getImplicitReg()) << ")";
283 &RegInfo.getRegClass(Op.Info->RegClass))
286 if (Op.isTied())
287 Stream << " TiedToOp" << Op.getTiedToIndex();
297 Stream << "Op" << OperandIndex;
326 return std::tie(Op, Reg) == std::tie(Other.Op, Other.Reg);
338 for (const auto &Op : Operands) {
339 if (Op.isReg() && Op.isDef() == SelectDef) {
340 const int SourceReg = Op.getRegisterAliasing().getOrigin(Reg);
342 OperandValues.emplace_back(&Op, SourceReg);
349 return ROV.Op->isImplicit();
380 void DumpMCOperand(const MCRegisterInfo &MCRegisterInfo, const MCOperand &Op,
382 if (!Op.isValid())
384 else if (Op.isReg())
385 OS << MCRegisterInfo.getName(Op.getReg());
386 else if (Op.isImm())
387 OS << Op.getImm();
388 else if (Op.isDFPImm())
389 OS << bit_cast<double>(Op.getDFPImm());
390 else if (Op.isSFPImm())
391 OS << bit_cast<float>(Op.getSFPImm());
392 else if (Op.isExpr())
394 else if (Op.isInst())