Lines Matching +full:2 +full:d
7 ld2r {v0.2s, v1.2s}, [sp]
8 ld2 {v0.2s, v1.2s}, [sp]
10 ld2 {v0.d, v1.d}[0], [sp]
11 ld2r {v0.2d, v1.2d}, [sp]
12 ld2 {v0.2d, v1.2d}, [sp]
15 ld2r {v0.2s, v1.2s}, [sp], #8
16 ld2 {v0.2s, v1.2s}, [sp], #16
18 ld2 {v0.d, v1.d}[0], [sp], #16
19 ld2r {v0.2d, v1.2d}, [sp], #16
20 ld2 {v0.2d, v1.2d}, [sp], #32
23 ld2r {v0.2s, v1.2s}, [sp], x0
24 ld2 {v0.2s, v1.2s}, [sp], x0
26 ld2 {v0.d, v1.d}[0], [sp], x0
27 ld2r {v0.2d, v1.2d}, [sp], x0
28 ld2 {v0.2d, v1.2d}, [sp], x0
55 # ALL-NEXT: [2]: Latency
61 # ALL: [1] [2] [3] [4] [5] [6] Instructions:
64 # M3-NEXT: 2 5 1.00 * ld2r { v0.2s, v1.2s }, [sp]
65 # M3-NEXT: 2 10 5.00 * ld2 { v0.2s, v1.2s }, [sp]
66 # M3-NEXT: 3 6 1.00 * ld2 { v0.d, v1.d }[0], [sp]
67 # M3-NEXT: 2 5 1.00 * ld2r { v0.2d, v1.2d }, [sp]
68 # M3-NEXT: 2 10 5.00 * ld2 { v0.2d, v1.2d }, [sp]
70 # M3-NEXT: 3 5 1.00 * ld2r { v0.2s, v1.2s }, [sp], #8
71 # M3-NEXT: 3 10 5.00 * ld2 { v0.2s, v1.2s }, [sp], #16
72 # M3-NEXT: 4 6 1.00 * ld2 { v0.d, v1.d }[0], [sp], #16
73 # M3-NEXT: 3 5 1.00 * ld2r { v0.2d, v1.2d }, [sp], #16
74 # M3-NEXT: 3 10 5.00 * ld2 { v0.2d, v1.2d }, [sp], #32
76 # M3-NEXT: 3 5 1.00 * ld2r { v0.2s, v1.2s }, [sp], x0
77 # M3-NEXT: 3 10 5.00 * ld2 { v0.2s, v1.2s }, [sp], x0
78 # M3-NEXT: 4 6 1.00 * ld2 { v0.d, v1.d }[0], [sp], x0
79 # M3-NEXT: 3 5 1.00 * ld2r { v0.2d, v1.2d }, [sp], x0
80 # M3-NEXT: 3 10 5.00 * ld2 { v0.2d, v1.2d }, [sp], x0
83 # M4-NEXT: 2 5 1.00 * ld2r { v0.2s, v1.2s }, [sp]
84 # M4-NEXT: 2 10 3.00 * ld2 { v0.2s, v1.2s }, [sp]
85 # M4-NEXT: 3 6 1.00 * ld2 { v0.d, v1.d }[0], [sp]
86 # M4-NEXT: 2 5 1.00 * ld2r { v0.2d, v1.2d }, [sp]
87 # M4-NEXT: 2 10 3.00 * ld2 { v0.2d, v1.2d }, [sp]
89 # M4-NEXT: 3 5 1.00 * ld2r { v0.2s, v1.2s }, [sp], #8
90 # M4-NEXT: 3 10 3.00 * ld2 { v0.2s, v1.2s }, [sp], #16
91 # M4-NEXT: 4 6 1.00 * ld2 { v0.d, v1.d }[0], [sp], #16
92 # M4-NEXT: 3 5 1.00 * ld2r { v0.2d, v1.2d }, [sp], #16
93 # M4-NEXT: 3 10 3.00 * ld2 { v0.2d, v1.2d }, [sp], #32
95 # M4-NEXT: 3 5 1.00 * ld2r { v0.2s, v1.2s }, [sp], x0
96 # M4-NEXT: 3 10 3.00 * ld2 { v0.2s, v1.2s }, [sp], x0
97 # M4-NEXT: 4 6 1.00 * ld2 { v0.d, v1.d }[0], [sp], x0
98 # M4-NEXT: 3 5 1.00 * ld2r { v0.2d, v1.2d }, [sp], x0
99 # M4-NEXT: 3 10 3.00 * ld2 { v0.2d, v1.2d }, [sp], x0
102 # M5-NEXT: 2 6 1.00 * ld2r { v0.2s, v1.2s }, [sp]
103 # M5-NEXT: 2 11 5.50 * ld2 { v0.2s, v1.2s }, [sp]
104 # M5-NEXT: 3 7 1.00 * ld2 { v0.d, v1.d }[0], [sp]
105 # M5-NEXT: 2 6 1.00 * ld2r { v0.2d, v1.2d }, [sp]
106 # M5-NEXT: 2 11 5.50 * ld2 { v0.2d, v1.2d }, [sp]
108 # M5-NEXT: 3 6 1.00 * ld2r { v0.2s, v1.2s }, [sp], #8
109 # M5-NEXT: 3 11 5.50 * ld2 { v0.2s, v1.2s }, [sp], #16
110 # M5-NEXT: 4 7 1.00 * ld2 { v0.d, v1.d }[0], [sp], #16
111 # M5-NEXT: 3 6 1.00 * ld2r { v0.2d, v1.2d }, [sp], #16
112 # M5-NEXT: 3 11 5.50 * ld2 { v0.2d, v1.2d }, [sp], #32
114 # M5-NEXT: 3 6 1.00 * ld2r { v0.2s, v1.2s }, [sp], x0
115 # M5-NEXT: 3 11 5.50 * ld2 { v0.2s, v1.2s }, [sp], x0
116 # M5-NEXT: 4 7 1.00 * ld2 { v0.d, v1.d }[0], [sp], x0
117 # M5-NEXT: 3 6 1.00 * ld2r { v0.2d, v1.2d }, [sp], x0
118 # M5-NEXT: 3 11 5.50 * ld2 { v0.2d, v1.2d }, [sp], x0