Lines Matching refs:ENABLED
4 …-dom-info -unroll-runtime-multi-exit=true -verify-loop-info -S | FileCheck %s -check-prefix=ENABLED
163 ; ENABLED-LABEL: @test1(
164 ; ENABLED-NEXT: entry:
165 ; ENABLED-NEXT: [[TMP0:%.*]] = freeze i64 [[N:%.*]]
166 ; ENABLED-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], -1
167 ; ENABLED-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP0]], 7
168 ; ENABLED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], 7
169 ; ENABLED-NEXT: br i1 [[TMP2]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[ENTRY_NEW:%.*]]
170 ; ENABLED: entry.new:
171 ; ENABLED-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[TMP0]], [[XTRAITER]]
172 ; ENABLED-NEXT: br label [[HEADER:%.*]]
173 ; ENABLED: header:
174 ; ENABLED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], …
175 ; ENABLED-NEXT: [[SUM_02:%.*]] = phi i32 [ 0, [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
176 ; ENABLED-NEXT: [[NITER:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[NITER_NEXT_7:%.*]], [[LATCH_7]…
177 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK:%.*]]
178 ; ENABLED: for.exiting_block:
179 ; ENABLED-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
180 ; ENABLED-NEXT: br i1 [[CMP]], label [[OTHEREXIT_LOOPEXIT:%.*]], label [[LATCH:%.*]]
181 ; ENABLED: latch:
182 ; ENABLED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
183 ; ENABLED-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
184 ; ENABLED-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
185 ; ENABLED-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
186 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_1:%.*]]
187 ; ENABLED: for.exiting_block.1:
188 ; ENABLED-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
189 ; ENABLED-NEXT: br i1 [[CMP_1]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_1:%.*]]
190 ; ENABLED: latch.1:
191 ; ENABLED-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
192 ; ENABLED-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4
193 ; ENABLED-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
194 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
195 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_2:%.*]]
196 ; ENABLED: for.exiting_block.2:
197 ; ENABLED-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
198 ; ENABLED-NEXT: br i1 [[CMP_2]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_2:%.*]]
199 ; ENABLED: latch.2:
200 ; ENABLED-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
201 ; ENABLED-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4
202 ; ENABLED-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
203 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 3
204 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_3:%.*]]
205 ; ENABLED: for.exiting_block.3:
206 ; ENABLED-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
207 ; ENABLED-NEXT: br i1 [[CMP_3]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_3:%.*]]
208 ; ENABLED: latch.3:
209 ; ENABLED-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
210 ; ENABLED-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4
211 ; ENABLED-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
212 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4
213 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_4:%.*]]
214 ; ENABLED: for.exiting_block.4:
215 ; ENABLED-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
216 ; ENABLED-NEXT: br i1 [[CMP_4]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_4:%.*]]
217 ; ENABLED: latch.4:
218 ; ENABLED-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
219 ; ENABLED-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX_4]], align 4
220 ; ENABLED-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
221 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 5
222 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_5:%.*]]
223 ; ENABLED: for.exiting_block.5:
224 ; ENABLED-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
225 ; ENABLED-NEXT: br i1 [[CMP_5]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_5:%.*]]
226 ; ENABLED: latch.5:
227 ; ENABLED-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
228 ; ENABLED-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX_5]], align 4
229 ; ENABLED-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
230 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 6
231 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_6:%.*]]
232 ; ENABLED: for.exiting_block.6:
233 ; ENABLED-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
234 ; ENABLED-NEXT: br i1 [[CMP_6]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_6:%.*]]
235 ; ENABLED: latch.6:
236 ; ENABLED-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
237 ; ENABLED-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX_6]], align 4
238 ; ENABLED-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
239 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 7
240 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_7:%.*]]
241 ; ENABLED: for.exiting_block.7:
242 ; ENABLED-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
243 ; ENABLED-NEXT: br i1 [[CMP_7]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_7]]
244 ; ENABLED: latch.7:
245 ; ENABLED-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
246 ; ENABLED-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX_7]], align 4
247 ; ENABLED-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
248 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
249 ; ENABLED-NEXT: [[NITER_NEXT_7]] = add i64 [[NITER]], 8
250 ; ENABLED-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NEXT_7]], [[UNROLL_ITER]]
251 ; ENABLED-NEXT: br i1 [[NITER_NCMP_7]], label [[LATCHEXIT_UNR_LCSSA_LOOPEXIT:%.*]], label [[HEAD…
252 ; ENABLED: latchexit.unr-lcssa.loopexit:
253 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
254 ; ENABLED-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_7]], [[LATCH_7]] ]
255 ; ENABLED-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
256 ; ENABLED-NEXT: br label [[LATCHEXIT_UNR_LCSSA]]
257 ; ENABLED: latchexit.unr-lcssa:
258 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH:%.*]] = phi i32 [ poison, [[ENTRY:%.*]] ], [ [[SUM_0_LCSSA_PH_P…
259 ; ENABLED-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[LA…
260 ; ENABLED-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[LATCHEXIT_…
261 ; ENABLED-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
262 ; ENABLED-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_EPIL_PREHEADER:%.*]], label [[LATCHEXIT:%.*]]
263 ; ENABLED: header.epil.preheader:
264 ; ENABLED-NEXT: br label [[HEADER_EPIL:%.*]]
265 ; ENABLED: header.epil:
266 ; ENABLED-NEXT: [[INDVARS_IV_EPIL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_EPIL:%.*]], [[LATCH_EPIL:%…
267 ; ENABLED-NEXT: [[SUM_02_EPIL:%.*]] = phi i32 [ [[ADD_EPIL:%.*]], [[LATCH_EPIL]] ], [ [[SUM_02_U…
268 ; ENABLED-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ 0, [[HEADER_EPIL_PREHEADER]] ], [ [[EPIL_ITER_NEXT…
269 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_EPIL:%.*]]
270 ; ENABLED: for.exiting_block.epil:
271 ; ENABLED-NEXT: [[CMP_EPIL:%.*]] = icmp eq i64 [[N]], 42
272 ; ENABLED-NEXT: br i1 [[CMP_EPIL]], label [[OTHEREXIT_LOOPEXIT3:%.*]], label [[LATCH_EPIL]]
273 ; ENABLED: latch.epil:
274 ; ENABLED-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_…
275 ; ENABLED-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX_EPIL]], align 4
276 ; ENABLED-NEXT: [[ADD_EPIL]] = add nsw i32 [[TMP11]], [[SUM_02_EPIL]]
277 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_EPIL]] = add i64 [[INDVARS_IV_EPIL]], 1
278 ; ENABLED-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_EPIL]], [[N]]
279 ; ENABLED-NEXT: [[EPIL_ITER_NEXT]] = add i64 [[EPIL_ITER]], 1
280 ; ENABLED-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i64 [[EPIL_ITER_NEXT]], [[XTRAITER]]
281 ; ENABLED-NEXT: br i1 [[EPIL_ITER_CMP]], label [[HEADER_EPIL]], label [[LATCHEXIT_EPILOG_LCSSA:%…
282 ; ENABLED: latchexit.epilog-lcssa:
283 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH2:%.*]] = phi i32 [ [[ADD_EPIL]], [[LATCH_EPIL]] ]
284 ; ENABLED-NEXT: br label [[LATCHEXIT]]
285 ; ENABLED: latchexit:
286 ; ENABLED-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[SUM_0_LCSSA_PH]], [[LATCHEXIT_UNR_LCSSA]] ], […
287 ; ENABLED-NEXT: ret i32 [[SUM_0_LCSSA]]
288 ; ENABLED: otherexit.loopexit:
289 ; ENABLED-NEXT: [[SUM_02_LCSSA_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD…
290 ; ENABLED-NEXT: br label [[OTHEREXIT:%.*]]
291 ; ENABLED: otherexit.loopexit3:
292 ; ENABLED-NEXT: [[SUM_02_LCSSA_PH4:%.*]] = phi i32 [ [[SUM_02_EPIL]], [[FOR_EXITING_BLOCK_EPIL]]…
293 ; ENABLED-NEXT: br label [[OTHEREXIT]]
294 ; ENABLED: otherexit:
295 ; ENABLED-NEXT: [[SUM_02_LCSSA:%.*]] = phi i32 [ [[SUM_02_LCSSA_PH]], [[OTHEREXIT_LOOPEXIT]] ], …
296 ; ENABLED-NEXT: [[RVAL:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"(i32 …
297 ; ENABLED-NEXT: ret i32 [[RVAL]]
377 ; ENABLED-LABEL: @test2(
378 ; ENABLED-NEXT: entry:
379 ; ENABLED-NEXT: [[TMP0:%.*]] = freeze i64 [[N:%.*]]
380 ; ENABLED-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], -1
381 ; ENABLED-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP0]], 7
382 ; ENABLED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], 7
383 ; ENABLED-NEXT: br i1 [[TMP2]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[ENTRY_NEW:%.*]]
384 ; ENABLED: entry.new:
385 ; ENABLED-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[TMP0]], [[XTRAITER]]
386 ; ENABLED-NEXT: br label [[HEADER:%.*]]
387 ; ENABLED: header:
388 ; ENABLED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], …
389 ; ENABLED-NEXT: [[SUM_02:%.*]] = phi i32 [ 0, [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
390 ; ENABLED-NEXT: [[NITER:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[NITER_NEXT_7:%.*]], [[LATCH_7]…
391 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK:%.*]]
392 ; ENABLED: for.exiting_block:
393 ; ENABLED-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
394 ; ENABLED-NEXT: br i1 [[CMP]], label [[OTHEREXIT_LOOPEXIT:%.*]], label [[LATCH:%.*]]
395 ; ENABLED: latch:
396 ; ENABLED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
397 ; ENABLED-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
398 ; ENABLED-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
399 ; ENABLED-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
400 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_1:%.*]]
401 ; ENABLED: for.exiting_block.1:
402 ; ENABLED-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
403 ; ENABLED-NEXT: br i1 [[CMP_1]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_1:%.*]]
404 ; ENABLED: latch.1:
405 ; ENABLED-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
406 ; ENABLED-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4
407 ; ENABLED-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
408 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
409 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_2:%.*]]
410 ; ENABLED: for.exiting_block.2:
411 ; ENABLED-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
412 ; ENABLED-NEXT: br i1 [[CMP_2]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_2:%.*]]
413 ; ENABLED: latch.2:
414 ; ENABLED-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
415 ; ENABLED-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4
416 ; ENABLED-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
417 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 3
418 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_3:%.*]]
419 ; ENABLED: for.exiting_block.3:
420 ; ENABLED-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
421 ; ENABLED-NEXT: br i1 [[CMP_3]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_3:%.*]]
422 ; ENABLED: latch.3:
423 ; ENABLED-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
424 ; ENABLED-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4
425 ; ENABLED-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
426 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4
427 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_4:%.*]]
428 ; ENABLED: for.exiting_block.4:
429 ; ENABLED-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
430 ; ENABLED-NEXT: br i1 [[CMP_4]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_4:%.*]]
431 ; ENABLED: latch.4:
432 ; ENABLED-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
433 ; ENABLED-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX_4]], align 4
434 ; ENABLED-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
435 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 5
436 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_5:%.*]]
437 ; ENABLED: for.exiting_block.5:
438 ; ENABLED-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
439 ; ENABLED-NEXT: br i1 [[CMP_5]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_5:%.*]]
440 ; ENABLED: latch.5:
441 ; ENABLED-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
442 ; ENABLED-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX_5]], align 4
443 ; ENABLED-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
444 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 6
445 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_6:%.*]]
446 ; ENABLED: for.exiting_block.6:
447 ; ENABLED-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
448 ; ENABLED-NEXT: br i1 [[CMP_6]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_6:%.*]]
449 ; ENABLED: latch.6:
450 ; ENABLED-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
451 ; ENABLED-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX_6]], align 4
452 ; ENABLED-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
453 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 7
454 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_7:%.*]]
455 ; ENABLED: for.exiting_block.7:
456 ; ENABLED-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
457 ; ENABLED-NEXT: br i1 [[CMP_7]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_7]]
458 ; ENABLED: latch.7:
459 ; ENABLED-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
460 ; ENABLED-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX_7]], align 4
461 ; ENABLED-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
462 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
463 ; ENABLED-NEXT: [[NITER_NEXT_7]] = add i64 [[NITER]], 8
464 ; ENABLED-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NEXT_7]], [[UNROLL_ITER]]
465 ; ENABLED-NEXT: br i1 [[NITER_NCMP_7]], label [[LATCHEXIT_UNR_LCSSA_LOOPEXIT:%.*]], label [[HEAD…
466 ; ENABLED: latchexit.unr-lcssa.loopexit:
467 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
468 ; ENABLED-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_7]], [[LATCH_7]] ]
469 ; ENABLED-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
470 ; ENABLED-NEXT: br label [[LATCHEXIT_UNR_LCSSA]]
471 ; ENABLED: latchexit.unr-lcssa:
472 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH:%.*]] = phi i32 [ poison, [[ENTRY:%.*]] ], [ [[SUM_0_LCSSA_PH_P…
473 ; ENABLED-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[LA…
474 ; ENABLED-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[LATCHEXIT_…
475 ; ENABLED-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
476 ; ENABLED-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_EPIL_PREHEADER:%.*]], label [[LATCHEXIT:%.*]]
477 ; ENABLED: header.epil.preheader:
478 ; ENABLED-NEXT: br label [[HEADER_EPIL:%.*]]
479 ; ENABLED: header.epil:
480 ; ENABLED-NEXT: [[INDVARS_IV_EPIL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_EPIL:%.*]], [[LATCH_EPIL:%…
481 ; ENABLED-NEXT: [[SUM_02_EPIL:%.*]] = phi i32 [ [[ADD_EPIL:%.*]], [[LATCH_EPIL]] ], [ [[SUM_02_U…
482 ; ENABLED-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ 0, [[HEADER_EPIL_PREHEADER]] ], [ [[EPIL_ITER_NEXT…
483 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_EPIL:%.*]]
484 ; ENABLED: for.exiting_block.epil:
485 ; ENABLED-NEXT: [[CMP_EPIL:%.*]] = icmp eq i64 [[N]], 42
486 ; ENABLED-NEXT: br i1 [[CMP_EPIL]], label [[OTHEREXIT_LOOPEXIT2:%.*]], label [[LATCH_EPIL]]
487 ; ENABLED: latch.epil:
488 ; ENABLED-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_…
489 ; ENABLED-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX_EPIL]], align 4
490 ; ENABLED-NEXT: [[ADD_EPIL]] = add nsw i32 [[TMP11]], [[SUM_02_EPIL]]
491 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_EPIL]] = add i64 [[INDVARS_IV_EPIL]], 1
492 ; ENABLED-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_EPIL]], [[N]]
493 ; ENABLED-NEXT: [[EPIL_ITER_NEXT]] = add i64 [[EPIL_ITER]], 1
494 ; ENABLED-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i64 [[EPIL_ITER_NEXT]], [[XTRAITER]]
495 ; ENABLED-NEXT: br i1 [[EPIL_ITER_CMP]], label [[HEADER_EPIL]], label [[LATCHEXIT_EPILOG_LCSSA:%…
496 ; ENABLED: latchexit.epilog-lcssa:
497 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH1:%.*]] = phi i32 [ [[ADD_EPIL]], [[LATCH_EPIL]] ]
498 ; ENABLED-NEXT: br label [[LATCHEXIT]]
499 ; ENABLED: latchexit:
500 ; ENABLED-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[SUM_0_LCSSA_PH]], [[LATCHEXIT_UNR_LCSSA]] ], […
501 ; ENABLED-NEXT: ret i32 [[SUM_0_LCSSA]]
502 ; ENABLED: otherexit.loopexit:
503 ; ENABLED-NEXT: [[RVAL_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD]], [[FO…
504 ; ENABLED-NEXT: br label [[OTHEREXIT:%.*]]
505 ; ENABLED: otherexit.loopexit2:
506 ; ENABLED-NEXT: [[RVAL_PH3:%.*]] = phi i32 [ [[SUM_02_EPIL]], [[FOR_EXITING_BLOCK_EPIL]] ]
507 ; ENABLED-NEXT: br label [[OTHEREXIT]]
508 ; ENABLED: otherexit:
509 ; ENABLED-NEXT: [[RVAL:%.*]] = phi i32 [ [[RVAL_PH]], [[OTHEREXIT_LOOPEXIT]] ], [ [[RVAL_PH3]], …
510 ; ENABLED-NEXT: ret i32 [[RVAL]]
590 ; ENABLED-LABEL: @test3(
591 ; ENABLED-NEXT: entry:
592 ; ENABLED-NEXT: br label [[HEADER:%.*]]
593 ; ENABLED: header:
594 ; ENABLED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LATCH:%.*]] ], [ 0, [[…
595 ; ENABLED-NEXT: [[SUM_02:%.*]] = phi i32 [ [[ADD:%.*]], [[LATCH]] ], [ 0, [[ENTRY]] ]
596 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK:%.*]]
597 ; ENABLED: for.exiting_block:
598 ; ENABLED-NEXT: [[CMP:%.*]] = icmp eq i64 [[N:%.*]], 42
599 ; ENABLED-NEXT: br i1 [[CMP]], label [[OTHEREXIT:%.*]], label [[LATCH]]
600 ; ENABLED: latch:
601 ; ENABLED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
602 ; ENABLED-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
603 ; ENABLED-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[SUM_02]]
604 ; ENABLED-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
605 ; ENABLED-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[N]]
606 ; ENABLED-NEXT: br i1 [[EXITCOND]], label [[LATCHEXIT:%.*]], label [[HEADER]], !prof [[PROF4:![0…
607 ; ENABLED: latchexit:
608 ; ENABLED-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[ADD]], [[LATCH]] ]
609 ; ENABLED-NEXT: ret i32 [[SUM_0_LCSSA]]
610 ; ENABLED: otherexit:
611 ; ENABLED-NEXT: ret i32 57
690 ; ENABLED-LABEL: @test4(
691 ; ENABLED-NEXT: entry:
692 ; ENABLED-NEXT: br label [[HEADER:%.*]]
693 ; ENABLED: header:
694 ; ENABLED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LATCH:%.*]] ], [ 0, [[…
695 ; ENABLED-NEXT: [[SUM_02:%.*]] = phi i32 [ [[ADD:%.*]], [[LATCH]] ], [ 0, [[ENTRY]] ]
696 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK:%.*]]
697 ; ENABLED: for.exiting_block:
698 ; ENABLED-NEXT: [[CMP:%.*]] = icmp eq i64 [[INDVARS_IV]], 4096
699 ; ENABLED-NEXT: br i1 [[CMP]], label [[OTHEREXIT:%.*]], label [[LATCH]]
700 ; ENABLED: latch:
701 ; ENABLED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
702 ; ENABLED-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
703 ; ENABLED-NEXT: [[ADD]] = add nsw i32 [[TMP0]], [[SUM_02]]
704 ; ENABLED-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV]], 1
705 ; ENABLED-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[N:%.*]]
706 ; ENABLED-NEXT: br i1 [[EXITCOND]], label [[LATCHEXIT:%.*]], label [[HEADER]]
707 ; ENABLED: latchexit:
708 ; ENABLED-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[ADD]], [[LATCH]] ]
709 ; ENABLED-NEXT: ret i32 [[SUM_0_LCSSA]]
710 ; ENABLED: otherexit:
711 ; ENABLED-NEXT: ret i32 57
896 ; ENABLED-LABEL: @test5(
897 ; ENABLED-NEXT: entry:
898 ; ENABLED-NEXT: [[TMP0:%.*]] = freeze i64 [[N:%.*]]
899 ; ENABLED-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], -1
900 ; ENABLED-NEXT: [[XTRAITER:%.*]] = and i64 [[TMP0]], 7
901 ; ENABLED-NEXT: [[TMP2:%.*]] = icmp ult i64 [[TMP1]], 7
902 ; ENABLED-NEXT: br i1 [[TMP2]], label [[LATCHEXIT_UNR_LCSSA:%.*]], label [[ENTRY_NEW:%.*]]
903 ; ENABLED: entry.new:
904 ; ENABLED-NEXT: [[UNROLL_ITER:%.*]] = sub i64 [[TMP0]], [[XTRAITER]]
905 ; ENABLED-NEXT: br label [[HEADER:%.*]]
906 ; ENABLED: header:
907 ; ENABLED-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[INDVARS_IV_NEXT_7:%.*]], …
908 ; ENABLED-NEXT: [[SUM_02:%.*]] = phi i32 [ 0, [[ENTRY_NEW]] ], [ [[ADD_7:%.*]], [[LATCH_7]] ]
909 ; ENABLED-NEXT: [[NITER:%.*]] = phi i64 [ 0, [[ENTRY_NEW]] ], [ [[NITER_NEXT_7:%.*]], [[LATCH_7]…
910 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK:%.*]]
911 ; ENABLED: for.exiting_block:
912 ; ENABLED-NEXT: [[CMP:%.*]] = icmp eq i64 [[N]], 42
913 ; ENABLED-NEXT: br i1 [[CMP]], label [[OTHEREXIT_LOOPEXIT:%.*]], label [[LATCH:%.*]]
914 ; ENABLED: latch:
915 ; ENABLED-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i64 [[INDVARS_IV]]
916 ; ENABLED-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
917 ; ENABLED-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[SUM_02]]
918 ; ENABLED-NEXT: [[INDVARS_IV_NEXT:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 1
919 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_1:%.*]]
920 ; ENABLED: for.exiting_block.1:
921 ; ENABLED-NEXT: [[CMP_1:%.*]] = icmp eq i64 [[N]], 42
922 ; ENABLED-NEXT: br i1 [[CMP_1]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_1:%.*]]
923 ; ENABLED: latch.1:
924 ; ENABLED-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
925 ; ENABLED-NEXT: [[TMP4:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4
926 ; ENABLED-NEXT: [[ADD_1:%.*]] = add nsw i32 [[TMP4]], [[ADD]]
927 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_1:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 2
928 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_2:%.*]]
929 ; ENABLED: for.exiting_block.2:
930 ; ENABLED-NEXT: [[CMP_2:%.*]] = icmp eq i64 [[N]], 42
931 ; ENABLED-NEXT: br i1 [[CMP_2]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_2:%.*]]
932 ; ENABLED: latch.2:
933 ; ENABLED-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
934 ; ENABLED-NEXT: [[TMP5:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4
935 ; ENABLED-NEXT: [[ADD_2:%.*]] = add nsw i32 [[TMP5]], [[ADD_1]]
936 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_2:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 3
937 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_3:%.*]]
938 ; ENABLED: for.exiting_block.3:
939 ; ENABLED-NEXT: [[CMP_3:%.*]] = icmp eq i64 [[N]], 42
940 ; ENABLED-NEXT: br i1 [[CMP_3]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_3:%.*]]
941 ; ENABLED: latch.3:
942 ; ENABLED-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
943 ; ENABLED-NEXT: [[TMP6:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4
944 ; ENABLED-NEXT: [[ADD_3:%.*]] = add nsw i32 [[TMP6]], [[ADD_2]]
945 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_3:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 4
946 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_4:%.*]]
947 ; ENABLED: for.exiting_block.4:
948 ; ENABLED-NEXT: [[CMP_4:%.*]] = icmp eq i64 [[N]], 42
949 ; ENABLED-NEXT: br i1 [[CMP_4]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_4:%.*]]
950 ; ENABLED: latch.4:
951 ; ENABLED-NEXT: [[ARRAYIDX_4:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
952 ; ENABLED-NEXT: [[TMP7:%.*]] = load i32, ptr [[ARRAYIDX_4]], align 4
953 ; ENABLED-NEXT: [[ADD_4:%.*]] = add nsw i32 [[TMP7]], [[ADD_3]]
954 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_4:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 5
955 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_5:%.*]]
956 ; ENABLED: for.exiting_block.5:
957 ; ENABLED-NEXT: [[CMP_5:%.*]] = icmp eq i64 [[N]], 42
958 ; ENABLED-NEXT: br i1 [[CMP_5]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_5:%.*]]
959 ; ENABLED: latch.5:
960 ; ENABLED-NEXT: [[ARRAYIDX_5:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
961 ; ENABLED-NEXT: [[TMP8:%.*]] = load i32, ptr [[ARRAYIDX_5]], align 4
962 ; ENABLED-NEXT: [[ADD_5:%.*]] = add nsw i32 [[TMP8]], [[ADD_4]]
963 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_5:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 6
964 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_6:%.*]]
965 ; ENABLED: for.exiting_block.6:
966 ; ENABLED-NEXT: [[CMP_6:%.*]] = icmp eq i64 [[N]], 42
967 ; ENABLED-NEXT: br i1 [[CMP_6]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_6:%.*]]
968 ; ENABLED: latch.6:
969 ; ENABLED-NEXT: [[ARRAYIDX_6:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
970 ; ENABLED-NEXT: [[TMP9:%.*]] = load i32, ptr [[ARRAYIDX_6]], align 4
971 ; ENABLED-NEXT: [[ADD_6:%.*]] = add nsw i32 [[TMP9]], [[ADD_5]]
972 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_6:%.*]] = add nuw nsw i64 [[INDVARS_IV]], 7
973 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_7:%.*]]
974 ; ENABLED: for.exiting_block.7:
975 ; ENABLED-NEXT: [[CMP_7:%.*]] = icmp eq i64 [[N]], 42
976 ; ENABLED-NEXT: br i1 [[CMP_7]], label [[OTHEREXIT_LOOPEXIT]], label [[LATCH_7]]
977 ; ENABLED: latch.7:
978 ; ENABLED-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_NEX…
979 ; ENABLED-NEXT: [[TMP10:%.*]] = load i32, ptr [[ARRAYIDX_7]], align 4
980 ; ENABLED-NEXT: [[ADD_7]] = add nsw i32 [[TMP10]], [[ADD_6]]
981 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_7]] = add i64 [[INDVARS_IV]], 8
982 ; ENABLED-NEXT: [[NITER_NEXT_7]] = add i64 [[NITER]], 8
983 ; ENABLED-NEXT: [[NITER_NCMP_7:%.*]] = icmp eq i64 [[NITER_NEXT_7]], [[UNROLL_ITER]]
984 ; ENABLED-NEXT: br i1 [[NITER_NCMP_7]], label [[LATCHEXIT_UNR_LCSSA_LOOPEXIT:%.*]], label [[HEAD…
985 ; ENABLED: latchexit.unr-lcssa.loopexit:
986 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
987 ; ENABLED-NEXT: [[INDVARS_IV_UNR_PH:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_7]], [[LATCH_7]] ]
988 ; ENABLED-NEXT: [[SUM_02_UNR_PH:%.*]] = phi i32 [ [[ADD_7]], [[LATCH_7]] ]
989 ; ENABLED-NEXT: br label [[LATCHEXIT_UNR_LCSSA]]
990 ; ENABLED: latchexit.unr-lcssa:
991 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH:%.*]] = phi i32 [ poison, [[ENTRY:%.*]] ], [ [[SUM_0_LCSSA_PH_P…
992 ; ENABLED-NEXT: [[INDVARS_IV_UNR:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INDVARS_IV_UNR_PH]], [[LA…
993 ; ENABLED-NEXT: [[SUM_02_UNR:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[SUM_02_UNR_PH]], [[LATCHEXIT_…
994 ; ENABLED-NEXT: [[LCMP_MOD:%.*]] = icmp ne i64 [[XTRAITER]], 0
995 ; ENABLED-NEXT: br i1 [[LCMP_MOD]], label [[HEADER_EPIL_PREHEADER:%.*]], label [[LATCHEXIT:%.*]]
996 ; ENABLED: header.epil.preheader:
997 ; ENABLED-NEXT: br label [[HEADER_EPIL:%.*]]
998 ; ENABLED: header.epil:
999 ; ENABLED-NEXT: [[INDVARS_IV_EPIL:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_EPIL:%.*]], [[LATCH_EPIL:%…
1000 ; ENABLED-NEXT: [[SUM_02_EPIL:%.*]] = phi i32 [ [[ADD_EPIL:%.*]], [[LATCH_EPIL]] ], [ [[SUM_02_U…
1001 ; ENABLED-NEXT: [[EPIL_ITER:%.*]] = phi i64 [ 0, [[HEADER_EPIL_PREHEADER]] ], [ [[EPIL_ITER_NEXT…
1002 ; ENABLED-NEXT: br label [[FOR_EXITING_BLOCK_EPIL:%.*]]
1003 ; ENABLED: for.exiting_block.epil:
1004 ; ENABLED-NEXT: [[CMP_EPIL:%.*]] = icmp eq i64 [[N]], 42
1005 ; ENABLED-NEXT: br i1 [[CMP_EPIL]], label [[OTHEREXIT_LOOPEXIT3:%.*]], label [[LATCH_EPIL]]
1006 ; ENABLED: latch.epil:
1007 ; ENABLED-NEXT: [[ARRAYIDX_EPIL:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 [[INDVARS_IV_…
1008 ; ENABLED-NEXT: [[TMP11:%.*]] = load i32, ptr [[ARRAYIDX_EPIL]], align 4
1009 ; ENABLED-NEXT: [[ADD_EPIL]] = add nsw i32 [[TMP11]], [[SUM_02_EPIL]]
1010 ; ENABLED-NEXT: [[INDVARS_IV_NEXT_EPIL]] = add i64 [[INDVARS_IV_EPIL]], 1
1011 ; ENABLED-NEXT: [[EXITCOND_EPIL:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT_EPIL]], [[N]]
1012 ; ENABLED-NEXT: [[EPIL_ITER_NEXT]] = add i64 [[EPIL_ITER]], 1
1013 ; ENABLED-NEXT: [[EPIL_ITER_CMP:%.*]] = icmp ne i64 [[EPIL_ITER_NEXT]], [[XTRAITER]]
1014 ; ENABLED-NEXT: br i1 [[EPIL_ITER_CMP]], label [[HEADER_EPIL]], label [[LATCHEXIT_EPILOG_LCSSA:%…
1015 ; ENABLED: latchexit.epilog-lcssa:
1016 ; ENABLED-NEXT: [[SUM_0_LCSSA_PH2:%.*]] = phi i32 [ [[ADD_EPIL]], [[LATCH_EPIL]] ]
1017 ; ENABLED-NEXT: br label [[LATCHEXIT]]
1018 ; ENABLED: latchexit:
1019 ; ENABLED-NEXT: [[SUM_0_LCSSA:%.*]] = phi i32 [ [[SUM_0_LCSSA_PH]], [[LATCHEXIT_UNR_LCSSA]] ], […
1020 ; ENABLED-NEXT: ret i32 [[SUM_0_LCSSA]]
1021 ; ENABLED: otherexit.loopexit:
1022 ; ENABLED-NEXT: [[SUM_02_LCSSA_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD…
1023 ; ENABLED-NEXT: [[RVAL_PH:%.*]] = phi i32 [ [[SUM_02]], [[FOR_EXITING_BLOCK]] ], [ [[ADD]], [[FO…
1024 ; ENABLED-NEXT: br label [[OTHEREXIT:%.*]]
1025 ; ENABLED: otherexit.loopexit3:
1026 ; ENABLED-NEXT: [[SUM_02_LCSSA_PH4:%.*]] = phi i32 [ [[SUM_02_EPIL]], [[FOR_EXITING_BLOCK_EPIL]]…
1027 ; ENABLED-NEXT: [[RVAL_PH5:%.*]] = phi i32 [ [[SUM_02_EPIL]], [[FOR_EXITING_BLOCK_EPIL]] ]
1028 ; ENABLED-NEXT: br label [[OTHEREXIT]]
1029 ; ENABLED: otherexit:
1030 ; ENABLED-NEXT: [[SUM_02_LCSSA:%.*]] = phi i32 [ [[SUM_02_LCSSA_PH]], [[OTHEREXIT_LOOPEXIT]] ], …
1031 ; ENABLED-NEXT: [[RVAL:%.*]] = phi i32 [ [[RVAL_PH]], [[OTHEREXIT_LOOPEXIT]] ], [ [[RVAL_PH5]], …
1032 ; ENABLED-NEXT: br label [[OTHEREXIT2:%.*]]
1033 ; ENABLED: otherexit2:
1034 ; ENABLED-NEXT: [[RVAL2:%.*]] = call i32 (...) @llvm.experimental.deoptimize.i32() [ "deopt"(i32…
1035 ; ENABLED-NEXT: ret i32 [[RVAL2]]