Lines Matching full:and
12 ; And then into:
21 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
23 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
24 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
27 %and = and i32 %x, %m
29 %and1 = and i32 %neg, %y
30 %ret = or i32 %and, %and1
36 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], [[M:%.*]]
38 ; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], [[NEG]]
39 ; CHECK-NEXT: [[RET:%.*]] = or disjoint <2 x i32> [[AND]], [[AND1]]
42 %and = and <2 x i32> %x, %m
44 %and1 = and <2 x i32> %neg, %y
45 %ret = or <2 x i32> %and, %and1
51 ; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], [[M:%.*]]
53 ; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[NEG]], [[Y:%.*]]
54 ; CHECK-NEXT: [[RET:%.*]] = or <3 x i32> [[AND]], [[AND1]]
57 %and = and <3 x i32> %x, %m
59 %and1 = and <3 x i32> %neg, %y
60 %ret = or <3 x i32> %and, %and1
66 ; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], [[M:%.*]]
68 ; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], [[NEG]]
69 ; CHECK-NEXT: [[RET:%.*]] = or disjoint <3 x i32> [[AND]], [[AND1]]
72 %and = and <3 x i32> %x, %m
74 %and1 = and <3 x i32> %neg, %y
75 %ret = or <3 x i32> %and, %and1
85 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
86 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
87 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
90 %and = and i32 %x, 65280
91 %and1 = and i32 %y, -65281
92 %ret = or i32 %and, %and1
98 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 65280)
99 ; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], splat (i32 -65281)
100 ; CHECK-NEXT: [[RET:%.*]] = or disjoint <2 x i32> [[AND]], [[AND1]]
103 %and = and <2 x i32> %x, <i32 65280, i32 65280>
104 %and1 = and <2 x i32> %y, <i32 -65281, i32 -65281>
105 %ret = or <2 x i32> %and, %and1
111 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 65280, i32 16776960>
112 ; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -16776961>
113 ; CHECK-NEXT: [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
116 %and = and <2 x i32> %x, <i32 65280, i32 16776960>
117 %and1 = and <2 x i32> %y, <i32 -65281, i32 -16776961>
118 %ret = or <2 x i32> %and, %and1
124 ; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], <i32 65280, i32 undef, i32 65280>
125 ; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], <i32 -65281, i32 undef, i32 -65281>
126 ; CHECK-NEXT: [[RET:%.*]] = or <3 x i32> [[AND]], [[AND1]]
129 %and = and <3 x i32> %x, <i32 65280, i32 undef, i32 65280>
130 %and1 = and <3 x i32> %y, <i32 -65281, i32 undef, i32 -65281>
131 %ret = or <3 x i32> %and, %and1
141 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 61440
142 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
143 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
146 %and = and i32 %x, 61440
147 %and1 = and i32 %y, -65281
148 %ret = or i32 %and, %and1
154 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], splat (i32 61440)
155 ; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], splat (i32 -65281)
156 ; CHECK-NEXT: [[RET:%.*]] = or disjoint <2 x i32> [[AND]], [[AND1]]
159 %and = and <2 x i32> %x, <i32 61440, i32 61440>
160 %and1 = and <2 x i32> %y, <i32 -65281, i32 -65281>
161 %ret = or <2 x i32> %and, %and1
167 ; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[X:%.*]], <i32 61440, i32 16711680>
168 ; CHECK-NEXT: [[AND1:%.*]] = and <2 x i32> [[Y:%.*]], <i32 -65281, i32 -16776961>
169 ; CHECK-NEXT: [[RET:%.*]] = or <2 x i32> [[AND]], [[AND1]]
172 %and = and <2 x i32> %x, <i32 61440, i32 16711680>
173 %and1 = and <2 x i32> %y, <i32 -65281, i32 -16776961>
174 %ret = or <2 x i32> %and, %and1
180 ; CHECK-NEXT: [[AND:%.*]] = and <3 x i32> [[X:%.*]], <i32 61440, i32 undef, i32 61440>
181 ; CHECK-NEXT: [[AND1:%.*]] = and <3 x i32> [[Y:%.*]], <i32 -65281, i32 undef, i32 -65281>
182 ; CHECK-NEXT: [[RET:%.*]] = or <3 x i32> [[AND]], [[AND1]]
185 %and = and <3 x i32> %x, <i32 61440, i32 undef, i32 61440>
186 %and1 = and <3 x i32> %y, <i32 -65281, i32 undef, i32 -65281>
187 %ret = or <3 x i32> %and, %and1
200 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[M:%.*]], [[X:%.*]]
202 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
203 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
206 %and = and i32 %m, %x ; swapped order
208 %and1 = and i32 %neg, %y
209 %ret = or i32 %and, %and1
216 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
218 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y]], [[NEG]]
219 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
223 %and = and i32 %x, %m
225 %and1 = and i32 %y, %neg; swapped order
226 %ret = or i32 %and, %and1
232 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
234 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
235 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND1]], [[AND]]
238 %and = and i32 %x, %m
240 %and1 = and i32 %neg, %y
241 %ret = or i32 %and1, %and ; swapped order
248 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[M:%.*]], [[X:%.*]]
250 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y]], [[NEG]]
251 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
255 %and = and i32 %m, %x ; swapped order
257 %and1 = and i32 %y, %neg; swapped order
258 %ret = or i32 %and, %and1
264 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[M:%.*]], [[X:%.*]]
266 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
267 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND1]], [[AND]]
270 %and = and i32 %m, %x ; swapped order
272 %and1 = and i32 %neg, %y
273 %ret = or i32 %and1, %and ; swapped order
280 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
282 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y]], [[NEG]]
283 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND1]], [[AND]]
287 %and = and i32 %x, %m
289 %and1 = and i32 %y, %neg; swapped order
290 %ret = or i32 %and1, %and ; swapped order
297 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[M:%.*]], [[X:%.*]]
299 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y]], [[NEG]]
300 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND1]], [[AND]]
304 %and = and i32 %m, %x ; swapped order
306 %and1 = and i32 %y, %neg; swapped order
307 %ret = or i32 %and1, %and ; swapped order
313 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
314 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
315 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND1]], [[AND]]
318 %and = and i32 %x, 65280
319 %and1 = and i32 %y, -65281
320 %ret = or i32 %and1, %and ; swapped order
334 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
336 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
337 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
338 ; CHECK-NEXT: call void @use32(i32 [[AND]])
343 %and = and i32 %x, %m
345 %and1 = and i32 %neg, %y
346 %ret = or i32 %and, %and1
347 call void @use32(i32 %and)
355 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
356 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65281
357 ; CHECK-NEXT: [[RET:%.*]] = or disjoint i32 [[AND]], [[AND1]]
358 ; CHECK-NEXT: call void @use32(i32 [[AND]])
362 %and = and i32 %x, 65280
363 %and1 = and i32 %y, -65281
364 %ret = or i32 %and, %and1
365 call void @use32(i32 %and)
374 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[M:%.*]]
376 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[NEG]], [[Y:%.*]]
377 ; CHECK-NEXT: [[RET:%.*]] = or i32 [[AND]], [[AND1]]
380 %and = and i32 %x, %m
382 %and1 = and i32 %neg, %y
383 %ret = or i32 %and, %and1
391 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[M1:%.*]], [[X:%.*]]
393 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], [[NEG]]
394 ; CHECK-NEXT: [[RET:%.*]] = or i32 [[AND]], [[AND1]]
397 %and = and i32 %m1, %x
399 %and1 = and i32 %neg, %y
400 %ret = or i32 %and, %and1
408 ; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 65280
409 ; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -65280
410 ; CHECK-NEXT: [[RET:%.*]] = or i32 [[AND]], [[AND1]]
413 %and = and i32 %x, 65280
414 %and1 = and i32 %y, -65280 ; not -65281, so they have one common bit
415 %ret = or i32 %and, %and1
422 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[AND2]], 65280
425 %and = and i32 %x, 65280
426 %and1 = and i32 %y, 65280 ; both masks are the same
427 %ret = or i32 %and, %and1