Lines Matching full:ret

18 ; CHECK-NEXT:    [[RET:%.*]] = and i32 [[TMP1]], [[X:%.*]]
19 ; CHECK-NEXT: ret i32 [[RET]]
22 %ret = lshr i32 %t0, %y
23 ret i32 %ret
29 ; CHECK-NEXT: ret i32 [[T0]]
32 %ret = lshr i32 %t0, 5
33 ret i32 %ret
39 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], 134217696
40 ; CHECK-NEXT: ret i32 [[RET]]
43 %ret = lshr i32 %t0, 5
44 ret i32 %ret
50 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], 4194303
51 ; CHECK-NEXT: ret i32 [[RET]]
54 %ret = lshr i32 %t0, 10
55 ret i32 %ret
61 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[TMP1]], 4194303
62 ; CHECK-NEXT: ret i32 [[RET]]
65 %ret = lshr exact i32 %t0, 10
66 ret i32 %ret
75 ; CHECK-NEXT: ret i32 [[X:%.*]]
78 %ret = lshr i32 %t0, %y ; this one is obviously 'exact'.
79 ret i32 %ret
84 ; CHECK-NEXT: ret i32 [[X:%.*]]
87 %ret = lshr i32 %t0, 5 ; this one is obviously 'exact'.
88 ret i32 %ret
93 ; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i32 [[X:%.*]], 5
94 ; CHECK-NEXT: ret i32 [[RET]]
97 %ret = lshr i32 %t0, 5 ; this one is obviously 'exact'.
98 ret i32 %ret
103 ; CHECK-NEXT: [[RET:%.*]] = lshr i32 [[X:%.*]], 5
104 ; CHECK-NEXT: ret i32 [[RET]]
107 %ret = lshr i32 %t0, 10
108 ret i32 %ret
113 ; CHECK-NEXT: [[RET:%.*]] = lshr exact i32 [[X:%.*]], 5
114 ; CHECK-NEXT: ret i32 [[RET]]
117 %ret = lshr exact i32 %t0, 10
118 ret i32 %ret
128 ; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], [[X:%.*]]
129 ; CHECK-NEXT: ret <2 x i32> [[RET]]
132 %ret = lshr <2 x i32> %t0, %y
133 ret <2 x i32> %ret
143 ; CHECK-NEXT: ret <2 x i32> [[T0]]
146 %ret = lshr <2 x i32> %t0, <i32 5, i32 5>
147 ret <2 x i32> %ret
153 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], splat (i32 5)
154 ; CHECK-NEXT: ret <3 x i32> [[RET]]
157 %ret = lshr <3 x i32> %t0, <i32 5, i32 5, i32 5>
158 ret <3 x i32> %ret
164 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], <i32 5, i32 undef, i32 5>
165 ; CHECK-NEXT: ret <3 x i32> [[RET]]
168 %ret = lshr <3 x i32> %t0, <i32 5, i32 undef, i32 5>
169 ret <3 x i32> %ret
174 ; CHECK-NEXT: [[RET:%.*]] = and <3 x i32> [[X:%.*]], <i32 134217727, i32 poison, i32 134217727>
175 ; CHECK-NEXT: ret <3 x i32> [[RET]]
178 %ret = lshr <3 x i32> %t0, <i32 5, i32 undef, i32 5>
179 ret <3 x i32> %ret
185 ; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], splat (i32 134217696)
186 ; CHECK-NEXT: ret <2 x i32> [[RET]]
189 %ret = lshr <2 x i32> %t0, <i32 5, i32 5>
190 ret <2 x i32> %ret
196 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], splat (i32 5)
197 ; CHECK-NEXT: ret <3 x i32> [[RET]]
200 %ret = lshr <3 x i32> %t0, <i32 5, i32 5, i32 5>
201 ret <3 x i32> %ret
207 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], <i32 5, i32 undef, i32 5>
208 ; CHECK-NEXT: ret <3 x i32> [[RET]]
211 %ret = lshr <3 x i32> %t0, <i32 5, i32 undef, i32 5>
212 ret <3 x i32> %ret
218 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], <i32 5, i32 undef, i32 5>
219 ; CHECK-NEXT: ret <3 x i32> [[RET]]
222 %ret = lshr <3 x i32> %t0, <i32 5, i32 undef, i32 5>
223 ret <3 x i32> %ret
229 ; CHECK-NEXT: [[RET:%.*]] = and <2 x i32> [[TMP1]], splat (i32 4194303)
230 ; CHECK-NEXT: ret <2 x i32> [[RET]]
233 %ret = lshr <2 x i32> %t0, <i32 10, i32 10>
234 ret <2 x i32> %ret
240 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], splat (i32 10)
241 ; CHECK-NEXT: ret <3 x i32> [[RET]]
244 %ret = lshr <3 x i32> %t0, <i32 10, i32 10, i32 10>
245 ret <3 x i32> %ret
251 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], <i32 10, i32 undef, i32 10>
252 ; CHECK-NEXT: ret <3 x i32> [[RET]]
255 %ret = lshr <3 x i32> %t0, <i32 10, i32 undef, i32 10>
256 ret <3 x i32> %ret
262 ; CHECK-NEXT: [[RET:%.*]] = lshr <3 x i32> [[T0]], <i32 10, i32 undef, i32 10>
263 ; CHECK-NEXT: ret <3 x i32> [[RET]]
266 %ret = lshr <3 x i32> %t0, <i32 10, i32 undef, i32 10>
267 ret <3 x i32> %ret
278 ; CHECK-NEXT: [[RET:%.*]] = and i32 [[X]], 134217727
279 ; CHECK-NEXT: ret i32 [[RET]]
283 %ret = lshr i32 %t0, 5
284 ret i32 %ret
291 ; CHECK-NEXT: [[RET:%.*]] = shl nuw nsw i32 [[X]], 5
292 ; CHECK-NEXT: ret i32 [[RET]]
296 %ret = lshr i32 %t0, 5
297 ret i32 %ret
304 ; CHECK-NEXT: [[RET:%.*]] = lshr i32 [[X]], 5
305 ; CHECK-NEXT: ret i32 [[RET]]
309 %ret = lshr i32 %t0, 10
310 ret i32 %ret
319 ; CHECK-NEXT: [[RET:%.*]] = lshr exact i32 [[T0]], 5
320 ; CHECK-NEXT: ret i32 [[RET]]
324 %ret = lshr i32 %t0, 5
325 ret i32 %ret
334 ; CHECK-NEXT: [[RET:%.*]] = lshr i32 [[T0]], 10
335 ; CHECK-NEXT: ret i32 [[RET]]
339 %ret = lshr i32 %t0, 10
340 ret i32 %ret
350 ; CHECK-NEXT: [[RET:%.*]] = lshr <2 x i32> [[T0]], <i32 5, i32 10>
351 ; CHECK-NEXT: ret <2 x i32> [[RET]]
354 %ret = lshr <2 x i32> %t0, <i32 5, i32 10>
355 ret <2 x i32> %ret
361 ; CHECK-NEXT: [[RET:%.*]] = lshr <2 x i32> [[T0]], splat (i32 5)
362 ; CHECK-NEXT: ret <2 x i32> [[RET]]
365 %ret = lshr <2 x i32> %t0, <i32 5, i32 5>
366 ret <2 x i32> %ret
376 ; CHECK-NEXT: [[RET:%.*]] = lshr i32 [[T0]], [[Z:%.*]]
377 ; CHECK-NEXT: ret i32 [[RET]]
380 %ret = lshr i32 %t0, %z ; $z, not %y
381 ret i32 %ret
391 ; CHECK-NEXT: [[RET:%.*]] = lshr exact i32 [[T0]], [[Y]]
392 ; CHECK-NEXT: ret i32 [[RET]]
396 %ret = lshr i32 %t0, %y
397 ret i32 %ret