Lines Matching refs:unordered
63 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
65 ; CHECK-NEXT: store atomic i32 1, ptr [[ARRAYIDX1]] unordered, align 4
70 …call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)
72 store atomic i32 1, ptr %arrayidx1 unordered, align 4
94 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
95 ; CHECK-NEXT: store atomic i32 1, ptr [[P]] unordered, align 4
99 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 28, i32 4)
100 store atomic i32 1, ptr %p unordered, align 4
109 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
114 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 28, i32 4)
139 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
140 ; CHECK-NEXT: store atomic i64 1, ptr [[P]] unordered, align 8
144 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 32, i32 4)
145 store atomic i64 1, ptr %p unordered, align 8
170 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
171 ; CHECK-NEXT: store atomic i64 1, ptr [[P]] unordered, align 8
176 …call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 28, i32 4)
177 store atomic i64 1, ptr %p unordered, align 8
199 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[P:%.*]], i8 0…
200 ; CHECK-NEXT: store atomic i32 1, ptr [[P]] unordered, align 4
204 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %p, i8 0, i64 32, i32 4)
205 store atomic i32 1, ptr %p unordered, align 4
225 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[P:%.*]], i8 0…
226 ; CHECK-NEXT: store atomic i16 1, ptr [[P]] unordered, align 4
230 call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %p, i8 0, i64 32, i32 4)
231 store atomic i16 1, ptr %p unordered, align 4
258 ; CHECK-NEXT: call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 [[TMP0]], i8 0,…
260 ; CHECK-NEXT: store atomic i64 1, ptr [[ARRAYIDX2]] unordered, align 8
265 …call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 4 %arrayidx0, i8 0, i64 32, i32 4)
267 store atomic i64 1, ptr %arrayidx2 unordered, align 8
296 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], …
298 ; CHECK-NEXT: store atomic i64 1, ptr [[BASE64_1]] unordered, align 8
299 ; CHECK-NEXT: store atomic i64 2, ptr [[P]] unordered, align 8
304 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)
308 store atomic i64 1, ptr %base64_1 unordered, align 8
309 store atomic i64 2, ptr %P unordered, align 8
317 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], …
319 ; CHECK-NEXT: store atomic i64 1, ptr [[BASE64_1]] unordered, align 8
325 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)
329 store atomic i64 1, ptr %base64_1 unordered, align 8
338 ; CHECK-NEXT: tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 [[TMP0]], …
341 ; CHECK-NEXT: store atomic i64 2, ptr [[P]] unordered, align 8
346 tail call void @llvm.memset.element.unordered.atomic.p0.i64(ptr align 8 %P, i8 0, i64 32, i32 8)
351 store atomic i64 2, ptr %P unordered, align 8
357 declare void @llvm.memset.element.unordered.atomic.p0.i64(ptr nocapture, i8, i64, i32) nounwind