Lines Matching full:start
7 define void @test.not.uge.ult(i8 %start, i8 %high) {
10 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
16 ; CHECK-NEXT: [[T_0:%.*]] = icmp ult i8 [[START]], [[HIGH]]
18 ; CHECK-NEXT: [[START_1:%.*]] = add nsw i8 [[START]], 1
21 ; CHECK-NEXT: [[START_2:%.*]] = add nsw i8 [[START]], 2
24 ; CHECK-NEXT: [[START_3:%.*]] = add nsw i8 [[START]], 3
27 ; CHECK-NEXT: [[START_4:%.*]] = add nsw i8 [[START]], 4
33 %add.ptr.i = add nsw i8 %start, 3
41 %t.0 = icmp ult i8 %start, %high
43 %start.1 = add nsw i8 %start, 1
44 %t.1 = icmp ult i8 %start.1, %high
46 %start.2 = add nsw i8 %start, 2
47 %t.2 = icmp ult i8 %start.2, %high
49 %start.3 = add nsw i8 %start, 3
50 %t.3 = icmp ult i8 %start.3, %high
52 %start.4 = add nsw i8 %start, 4
53 %c.4 = icmp ult i8 %start.4, %high
58 define void @test.not.sge.slt(i8 %start, i8 %high) {
61 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], 3
68 ; CHECK-NEXT: [[START_1:%.*]] = add nsw i8 [[START]], 1
70 ; CHECK-NEXT: [[START_2:%.*]] = add nsw i8 [[START]], 2
72 ; CHECK-NEXT: [[START_3:%.*]] = add nsw i8 [[START]], 3
74 ; CHECK-NEXT: [[START_4:%.*]] = add nsw i8 [[START]], 4
80 %add.ptr.i = add nsw i8 %start, 3
88 %t.0 = icmp slt i8 %start, %high
90 %start.1 = add nsw i8 %start, 1
91 %t.1 = icmp slt i8 %start.1, %high
93 %start.2 = add nsw i8 %start, 2
94 %t.2 = icmp slt i8 %start.2, %high
96 %start.3 = add nsw i8 %start, 3
97 %t.3 = icmp slt i8 %start.3, %high
99 %start.4 = add nsw i8 %start, 4
100 %c.4 = icmp slt i8 %start.4, %high
200 define void @test.sge.slt.add.neg(i8 %start, i8 %high) {
203 ; CHECK-NEXT: [[ADD_PTR_I:%.*]] = add nsw i8 [[START:%.*]], -3
206 ; CHECK-NEXT: [[C_2:%.*]] = icmp slt i8 [[START]], [[HIGH]]
208 ; CHECK-NEXT: [[START_1:%.*]] = add nsw i8 [[START]], 1
211 ; CHECK-NEXT: [[START_2:%.*]] = add nsw i8 [[START]], -2
214 ; CHECK-NEXT: [[START_3:%.*]] = add nsw i8 [[START]], -3
216 ; CHECK-NEXT: [[START_4:%.*]] = add nsw i8 [[START]], -4
221 %add.ptr.i = add nsw i8 %start, -3
224 %c.2 = icmp slt i8 %start, %high
226 %start.1 = add nsw i8 %start, 1
227 %c.3 = icmp slt i8 %start.1, %high
229 %start.2 = add nsw i8 %start, -2
230 %c.4 = icmp slt i8 %start.2, %high
232 %start.3 = add nsw i8 %start, -3
233 %t.1 = icmp slt i8 %start.3, %high
235 %start.4 = add nsw i8 %start, -4
236 %t.2 = icmp slt i8 %start.4, %high
241 define i1 @test_ult_add_nsw_pos_1(i8 %start, i8 %high) {
245 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
253 %start.ext = zext i8 %start to i16
254 %add.ext = add nsw i16 %start.ext, 3
258 %t = icmp ult i16 %start.ext, %high.ext
262 define i1 @test_ult_add_nsw_pos_1_assume_pos(i8 %start, i8 %high) {
265 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
267 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], 3
273 %start.pos = icmp sge i8 %start, 0
274 call void @llvm.assume(i1 %start.pos)
275 %add = add nsw i8 %start, 3
279 %t = icmp ult i8 %start, %high
283 define i1 @test_ult_add_nsw_pos_1_no_assume_pos(i8 %start, i8 %high) {
286 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], 3
289 ; CHECK-NEXT: [[T:%.*]] = icmp ult i8 [[START]], [[HIGH]]
293 %add = add nsw i8 %start, 3
297 %t = icmp ult i8 %start, %high
301 define i1 @test_ult_add_nsw_pos_1_cmp_no_ext(i8 %start, i8 %high) {
305 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
313 %start.ext = zext i8 %start to i16
314 %add.ext = add nsw i16 %start.ext, 3
318 %t = icmp ult i8 %start, %high
322 define i1 @test_ult_add_nsw_pos_2(i8 %start, i8 %high) {
326 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
334 %start.ext = zext i8 %start to i16
335 %add.ext = add nsw i16 %start.ext, 3
339 %f = icmp uge i16 %start.ext, %high.ext
343 define i1 @test_ult_add_nsw_pos_2_assume_pos(i8 %start, i8 %high) {
346 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
348 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], 3
354 %start.pos = icmp sge i8 %start, 0
355 call void @llvm.assume(i1 %start.pos)
356 %add = add nsw i8 %start, 3
360 %f = icmp uge i8 %start, %high
364 define i1 @test_ult_add_nsw_pos_2_cmp_no_ext(i8 %start, i8 %high) {
368 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
376 %start.ext = zext i8 %start to i16
377 %add.ext = add nsw i16 %start.ext, 3
381 %c = icmp uge i8 %start, %high
385 define i1 @test_ult_add_nsw_pos_3(i8 %start, i8 %high) {
389 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
399 %start.ext = zext i8 %start to i16
400 %add.ext = add nsw i16 %start.ext, 3
404 %add.4 = add nsw i16 %start.ext, 4
409 define i1 @test_ult_add_nsw_pos_3_assume_pos(i8 %start, i8 %high) {
412 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
414 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], 3
417 ; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i8 [[START]], 4
422 %start.pos = icmp sge i8 %start, 0
423 call void @llvm.assume(i1 %start.pos)
424 %add = add nsw i8 %start, 3
428 %add.4 = add nsw i8 %start, 4
433 define i1 @test_ult_add_nsw_pos_4(i8 %start, i8 %high) {
437 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
446 %start.ext = zext i8 %start to i16
447 %add.ext = add nsw i16 %start.ext, 3
451 %add.2 = add nsw i16 %start.ext, 2
456 define i1 @test_ult_add_nsw_pos_4_assume_pos(i8 %start, i8 %high) {
459 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
461 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], 3
464 ; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i8 [[START]], 2
468 %start.pos = icmp sge i8 %start, 0
469 call void @llvm.assume(i1 %start.pos)
470 %add = add nsw i8 %start, 3
474 %add.2 = add nsw i8 %start, 2
479 define i1 @test_ult_add_nsw_neg_5(i8 %start, i8 %high) {
483 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
493 %start.ext = zext i8 %start to i16
494 %add.ext = add nsw i16 %start.ext, 3
498 %sub.2 = add nsw i16 %start.ext, -2
503 define i1 @test_ult_add_nsw_neg_5_assume_pos(i8 %start, i8 %high) {
506 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
508 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], 3
511 ; CHECK-NEXT: [[SUB_2:%.*]] = add nsw i8 [[START]], -2
516 %start.pos = icmp sge i8 %start, 0
517 call void @llvm.assume(i1 %start.pos)
518 %add = add nsw i8 %start, 3
522 %sub.2 = add nsw i8 %start, -2
527 define i1 @test_ult_add_no_nsw_pos_6(i8 %start, i8 %high) {
531 ; CHECK-NEXT: [[START_EXT:%.*]] = zext i8 [[START:%.*]] to i16
541 %start.ext = zext i8 %start to i16
542 %add.ext = add i16 %start.ext, 3
546 %add.2 = add i16 %start.ext, 2
551 define i1 @test_ult_add_no_nsw_pos_6_assume_pos(i8 %start, i8 %high) {
554 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
556 ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START]], 3
559 ; CHECK-NEXT: [[ADD_2:%.*]] = add i8 [[START]], 2
564 %start.pos = icmp sge i8 %start, 0
565 call void @llvm.assume(i1 %start.pos)
566 %add = add i8 %start, 3
570 %add.2 = add i8 %start, 2
575 define i1 @test_ult_add_nsw_var_7(i8 %start, i8 %off, i8 %high) {
578 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], [[OFF:%.*]]
583 ; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[START]], [[HIGH]]
587 %add = add nsw i8 %start, %off
593 %c = icmp ult i8 %start, %high
597 define i1 @test_ult_add_no_nsw_var_7(i8 %start, i8 %off, i8 %high) {
600 ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START:%.*]], [[OFF:%.*]]
605 ; CHECK-NEXT: [[C:%.*]] = icmp ult i8 [[START]], [[HIGH]]
609 %add = add i8 %start, %off
615 %c = icmp ult i8 %start, %high
619 define i1 @test_ult_add_nsw_var_8(i8 %start, i8 %off.1, i8 %off.2, i8 %high) {
622 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START:%.*]], [[OFF_2:%.*]]
631 ; CHECK-NEXT: [[ADD_OFF_2:%.*]] = add nsw i8 [[START]], [[OFF_1]]
636 %add = add nsw i8 %start, %off.2
646 %add.off.2 = add nsw i8 %start, %off.1
651 define i1 @test_ult_add_nsw_var_8_all_pos(i8 %start, i8 %off.1, i8 %off.2, i8 %high) {
654 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
656 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], [[OFF_2:%.*]]
665 ; CHECK-NEXT: [[ADD_OFF_2:%.*]] = add nsw i8 [[START]], [[OFF_1]]
669 %start.pos = icmp sge i8 %start, 0
670 call void @llvm.assume(i1 %start.pos)
671 %add = add nsw i8 %start, %off.2
681 %add.off.2 = add nsw i8 %start, %off.1
686 define i1 @test_ult_add_no_nsw_var_8_all_pos(i8 %start, i8 %off.1, i8 %off.2, i8 %high) {
689 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
691 ; CHECK-NEXT: [[ADD:%.*]] = add i8 [[START]], [[OFF_2:%.*]]
700 ; CHECK-NEXT: [[ADD_OFF_2:%.*]] = add nsw i8 [[START]], [[OFF_1]]
705 %start.pos = icmp sge i8 %start, 0
706 call void @llvm.assume(i1 %start.pos)
707 %add = add i8 %start, %off.2
717 %add.off.2 = add nsw i8 %start, %off.1
722 define i1 @test_ult_add_nsw_var_9_all_pos(i8 %start, i8 %off.1, i8 %off.2, i8 %high) {
725 ; CHECK-NEXT: [[START_POS:%.*]] = icmp sge i8 [[START:%.*]], 0
727 ; CHECK-NEXT: [[ADD:%.*]] = add nsw i8 [[START]], [[OFF_2:%.*]]
734 ; CHECK-NEXT: [[ADD_OFF_2:%.*]] = add nsw i8 [[START]], [[OFF_1]]
739 %start.pos = icmp sge i8 %start, 0
740 call void @llvm.assume(i1 %start.pos)
741 %add = add nsw i8 %start, %off.2
749 %add.off.2 = add nsw i8 %start, %off.1