Lines Matching +full:0 +full:xaa

8 ! CHECK: encoding: [0x83,0x1c,0x00,0x00]
9 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
12 ! CHECK-NEXT: <MCOperand Imm:0>
13 ! CHECK-NEXT: <MCOperand Imm:0>
16 ! CHECK: encoding: [0x83,0x18,0x00,0x00]
17 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
20 ! CHECK-NEXT: <MCOperand Imm:0>
21 ! CHECK-NEXT: <MCOperand Imm:0>
24 ! CHECK: encoding: [0x93,0x1c,0x00,0x00]
25 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RI{{$}}
28 ! CHECK-NEXT: <MCOperand Imm:0>
29 ! CHECK-NEXT: <MCOperand Imm:0>
31     ld 0x123[%r7*], %r6
32 ! CHECK: encoding: [0x83,0x1d,0x01,0x23]
33 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
40 ! CHECK: encoding: [0x83,0x1d,0xff,0xfc]
41 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
47     ld 0x123[%r7], %r6
48 ! CHECK: encoding: [0x83,0x1e,0x01,0x23]
49 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
53 ! CHECK-NEXT: <MCOperand Imm:0>
55     ld 0x123[*%r7], %r6
56 ! CHECK: encoding: [0x83,0x1f,0x01,0x23]
57 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
64 ! CHECK: encoding: [0x83,0x1f,0xff,0xfc]
65 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
72 ! CHECK: encoding: [0x93,0x1d,0x00,0x04]
73 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RI{{$}}
80 ! CHECK: encoding: [0xf3,0x1f,0x24,0x02]
81 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STH_RI{{$}}
88 ! CHECK: encoding: [0xf3,0x1f,0x4f,0xff]
89 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDBs_RI{{$}}
96     ld [0x7fff], %r7
97 ! CHECK: encoding: [0x83,0x82,0x7f,0xff]
98 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
102 ! CHECK-NEXT: <MCOperand Imm:0>
104     ld [0x8000], %r7
105 ! CHECK: encoding: [0xf3,0x80,0x80,0x00]
106 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDADDR{{$}}
111     ld [0xfffffe8c], %pc
112 ! CHECK: encoding: [0x81,0x02,0xfe,0x8c]
113 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
117 ! CHECK-NEXT: <MCOperand Imm:0>
120 ! CHECK: encoding: [0x81,0x02,0xfe,0x8c]
121 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RI{{$}}
125 ! CHECK-NEXT: <MCOperand Imm:0>
129 ! CHECK: encoding: [0xaa,0x31,0x48,0x02]
130 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
137 ! CHECK: encoding: [0xaa,0x32,0x48,0x02]
138 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
142 ! CHECK-NEXT: <MCOperand Imm:0>
145 ! CHECK: encoding: [0xaa,0x32,0x4a,0x02]
146 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
153 ! CHECK: encoding: [0xaa,0x33,0x48,0x02]
154 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDW_RR{{$}}
161 ! CHECK: encoding: [0xba,0x33,0x48,0x02]
162 ! CHECK-NEXT: <MCInst #{{[0-9]+}} SW_RR{{$}}
169 ! CHECK: encoding: [0xaa,0x32,0x4a,0x04]
170 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDBs_RR{{$}}
177 ! CHECK: encoding: [0xaa,0x32,0x4a,0x01]
178 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDHz_RR{{$}}
187 ! CHECK: encoding: [0xf1,0x9b,0x60,0x00]
188 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
191 ! CHECK-NEXT: <MCOperand Imm:0>
192 ! CHECK-NEXT: <MCOperand Imm:0>
195 ! CHECK: encoding: [0xf1,0x9b,0x64,0x01]
196 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
203 ! CHECK: encoding: [0xf1,0x9b,0x68,0x01]
204 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
208 ! CHECK-NEXT: <MCOperand Imm:0>
211 ! CHECK: encoding: [0xf1,0x9b,0x6c,0x01]
212 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STB_RI{{$}}
219     st %r30, [0x1234]
220 ! CHECK: encoding: [0xff,0x01,0x12,0x34]
221 ! CHECK-NEXT: <MCInst #{{[0-9]+}} STADDR{{$}}
225     ld [0xfe8c], %pc
226 ! CHECK: encoding: [0xf1,0x00,0xfe,0x8c]
227 ! CHECK-NEXT: <MCInst #{{[0-9]+}} LDADDR{{$}}
233 ! CHECK: encoding: [0x02,0x01,A,A]
234 ! CHECK-NEXT: fixup A - offset: 0, value: hi(x), kind: FIXUP_LANAI_HI16{{$}}
235 ! CHECK-NEXT: <MCInst #{{[0-9]+}} ADD_I_HI
241 ! CHECK: encoding: [0x03,0x81,A,A]
242 ! CHECK-NEXT: fixup A - offset: 0, value: (hi(l))+4, kind: FIXUP_LANAI_HI16{{$}}
243 ! CHECK-NEXT: <MCInst #{{[0-9]+}} ADD_I_HI