Lines Matching full:s2
15 s_setreg_b32 0x1f803, s2
17 // GCN-NEXT: {{^}}s_setreg_b32 0x1f803, s2
20 s_setreg_b32 typo(0x40), s2
22 // GCN-NEXT: {{^}}s_setreg_b32 typo(0x40), s2
25 s_setreg_b32 hwreg(0x40), s2
27 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(0x40), s2
30 s_setreg_b32 {id: 0x40}, s2
32 // GCN-NEXT: {{^}}s_setreg_b32 {id: 0x40}, s2
35 s_setreg_b32 hwreg(HW_REG_WRONG), s2
37 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(HW_REG_WRONG), s2
40 s_setreg_b32 hwreg(1 2,3), s2
42 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(1 2,3), s2
45 s_setreg_b32 hwreg(1,2 3), s2
47 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(1,2 3), s2
50 s_setreg_b32 hwreg(1,2,3, s2
52 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(1,2,3, s2
55 s_setreg_b32 {id: 1 offset: 2, size: 3}, s2
57 // GCN-NEXT: {{^}}s_setreg_b32 {id: 1 offset: 2, size: 3}, s2
60 s_setreg_b32 {id: 1 offset: 2, size: 3}, s2
62 // GCN-NEXT: {{^}}s_setreg_b32 {id: 1 offset: 2, size: 3}, s2
65 s_setreg_b32 {id 1, offset: 2, size: 3}, s2
67 // GCN-NEXT: {{^}}s_setreg_b32 {id 1, offset: 2, size: 3}, s2
70 s_setreg_b32 {id: 1, offset: 2, size: 3, s2
72 // GCN-NEXT: {{^}}s_setreg_b32 {id: 1, offset: 2, size: 3, s2
75 s_setreg_b32 {id: 1, offset: 2, blah: 3}, s2
77 // GCN-NEXT: {{^}}s_setreg_b32 {id: 1, offset: 2, blah: 3}, s2
80 s_setreg_b32 {id: 1, id: 2}, s2
82 // GCN-NEXT: {{^}}s_setreg_b32 {id: 1, id: 2}, s2
85 s_setreg_b32 hwreg(3,32,32), s2
87 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(3,32,32), s2
90 s_setreg_b32 {id: 3, offset: 32, size: 32}, s2
92 // GCN-NEXT: {{^}}s_setreg_b32 {id: 3, offset: 32, size: 32}, s2
95 s_setreg_b32 hwreg(3,0,33), s2
97 // GCN-NEXT: {{^}}s_setreg_b32 hwreg(3,0,33), s2
100 s_setreg_b32 {id: 3, offset: 0, size: 33}, s2
102 // GCN-NEXT: {{^}}s_setreg_b32 {id: 3, offset: 0, size: 33}, s2
120 s_getreg_b32 s2, hwreg(3,32,32)
122 // GCN-NEXT: {{^}}s_getreg_b32 s2, hwreg(3,32,32)
125 s_getreg_b32 s2, {id: 3, offset: 32, size: 32}
127 // GCN-NEXT: {{^}}s_getreg_b32 s2, {id: 3, offset: 32, size: 32}
137 s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES)
138 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x02,0xb9]
140 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES)
142 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x82,0xb8]
143 // GFX11: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x82,0xb8]
145 s_getreg_b32 s2, hwreg(HW_REG_TBA_LO)
146 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_TBA_LO) ; encoding: [0x10,0xf8,0x02,0xb9]
148 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TBA_LO)
151 // GFX11-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TBA_LO)
153 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_TBA_LO) ; encoding: [0x10,0xf8,0x82,0xb8]
155 s_getreg_b32 s2, hwreg(HW_REG_TBA_HI)
156 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_TBA_HI) ; encoding: [0x11,0xf8,0x02,0xb9]
158 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TBA_HI)
161 // GFX11-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TBA_HI)
163 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_TBA_HI) ; encoding: [0x11,0xf8,0x82,0xb8]
165 s_getreg_b32 s2, hwreg(HW_REG_TMA_LO)
166 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_TMA_LO) ; encoding: [0x12,0xf8,0x02,0xb9]
168 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TMA_LO)
171 // GFX11-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TMA_LO)
173 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_TMA_LO) ; encoding: [0x12,0xf8,0x82,0xb8]
175 s_getreg_b32 s2, hwreg(HW_REG_TMA_HI)
176 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_TMA_HI) ; encoding: [0x13,0xf8,0x02,0xb9]
178 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TMA_HI)
181 // GFX11-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_TMA_HI)
183 // GFX9: s_getreg_b32 s2, hwreg(HW_REG_TMA_HI) ; encoding: [0x13,0xf8,0x82,0xb8]
185 s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO)
186 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO) ; encoding: [0x14,0xf8,0x02,0xb9]
188 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO)
191 // GFX9-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO)
193 // GFX11: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO) ; encoding: [0x14,0xf8,0x82,0xb8]
195 s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI)
196 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI) ; encoding: [0x15,0xf8,0x02,0xb9]
198 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI)
201 // GFX9-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI)
203 // GFX11: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI) ; encoding: [0x15,0xf8,0x82,0xb8]
205 s_getreg_b32 s2, hwreg(HW_REG_XNACK_MASK)
206 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_XNACK_MASK) ; encoding: [0x16,0xf8,0x02,0xb9]
208 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_XNACK_MASK)
213 s_getreg_b32 s2, hwreg(HW_REG_POPS_PACKER)
214 // GFX10: s_getreg_b32 s2, hwreg(HW_REG_POPS_PACKER) ; encoding: [0x19,0xf8,0x02,0xb9]
216 // SICIVI-ERR-NEXT: {{^}}s_getreg_b32 s2, hwreg(HW_REG_POPS_PACKER)
221 s_cmpk_le_u32 s2, -1
223 // GCN-NEXT: {{^}}s_cmpk_le_u32 s2, -1
226 s_cmpk_le_u32 s2, 0x1ffff
228 // GCN-NEXT: {{^}}s_cmpk_le_u32 s2, 0x1ffff
231 s_cmpk_le_u32 s2, 0x10000
233 // GCN-NEXT: {{^}}s_cmpk_le_u32 s2, 0x10000
236 s_mulk_i32 s2, 0xFFFFFFFFFFFF0000
238 // GCN-NEXT: {{^}}s_mulk_i32 s2, 0xFFFFFFFFFFFF0000
241 s_mulk_i32 s2, 0x10000
243 // GCN-NEXT: {{^}}s_mulk_i32 s2, 0x10000