Lines Matching refs:src_scc

24 v_dot2_f32_bf16 v5, ttmp15, src_scc, ttmp15
42 v_dot2_f32_bf16 v5, src_scc, vcc_lo, src_scc neg_lo:[1,0,0] neg_hi:[1,0,0]
66 v_dot2_f32_f16 v5, ttmp15, src_scc, ttmp15
81 v_dot2_f32_f16 v5, -1, exec_hi, src_scc
87 v_dot2_f32_f16 v5, src_scc, vcc_lo, -1 neg_lo:[0,1,0] neg_hi:[0,1,0]
111 v_dot4_i32_iu8 v5, ttmp15, src_scc, ttmp15
126 v_dot4_i32_iu8 v5, -1, exec_hi, src_scc
132 v_dot4_i32_iu8 v5, src_scc, vcc_lo, -1 neg_lo:[0,1,0]
156 v_dot4_u32_u8 v5, ttmp15, src_scc, ttmp15
171 v_dot4_u32_u8 v5, -1, exec_hi, src_scc
177 v_dot4_u32_u8 v5, src_scc, vcc_lo, -1
201 v_dot8_i32_iu4 v5, ttmp15, src_scc, ttmp15
216 v_dot8_i32_iu4 v5, -1, exec_hi, src_scc
222 v_dot8_i32_iu4 v5, src_scc, vcc_lo, -1 neg_lo:[0,1,0]
246 v_dot8_u32_u4 v5, ttmp15, src_scc, ttmp15
261 v_dot8_u32_u4 v5, -1, exec_hi, src_scc
267 v_dot8_u32_u4 v5, src_scc, vcc_lo, -1
288 v_fma_mix_f32 v5, vcc_hi, src_scc, v255
297 v_fma_mix_f32 v5, -|exec_lo|, null, -|src_scc|
312 v_fma_mix_f32 v255, -|src_scc|, -|vcc_hi|, null op_sel:[0,0,1] op_sel_hi:[0,0,0] clamp
330 v_fma_mixhi_f16 v5, vcc_hi, src_scc, v255
339 v_fma_mixhi_f16 v5, -|exec_lo|, null, -|src_scc|
354 v_fma_mixhi_f16 v255, -|src_scc|, -|vcc_hi|, null op_sel:[0,0,1] op_sel_hi:[0,0,0] clamp
372 v_fma_mixlo_f16 v5, vcc_hi, src_scc, v255
381 v_fma_mixlo_f16 v5, -|exec_lo|, null, -|src_scc|
396 v_fma_mixlo_f16 v255, -|src_scc|, -|vcc_hi|, null op_sel:[0,0,1] op_sel_hi:[0,0,0] clamp
417 v_pk_add_f16 v5, ttmp15, src_scc
438 v_pk_add_f16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] neg_lo:[0,0] neg_hi:[0,0]
462 v_pk_add_i16 v5, ttmp15, src_scc
486 v_pk_add_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
510 v_pk_add_u16 v5, ttmp15, src_scc
531 v_pk_add_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
555 v_pk_ashrrev_i16 v5, ttmp15, src_scc
576 v_pk_ashrrev_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
600 v_pk_fma_f16 v5, ttmp15, src_scc, ttmp15
615 v_pk_fma_f16 v5, -1, exec_hi, src_scc op_sel:[0,0,0] op_sel_hi:[1,1,1] neg_lo:[0,1,0] neg_hi:[0,1,0]
621 v_pk_fma_f16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] neg_lo:[0,0,0] neg_hi:[0,0,0]
645 v_pk_lshlrev_b16 v5, ttmp15, src_scc
666 v_pk_lshlrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
690 v_pk_lshrrev_b16 v5, ttmp15, src_scc
711 v_pk_lshrrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
735 v_pk_mad_i16 v5, ttmp15, src_scc, ttmp15
750 v_pk_mad_i16 v5, -1, exec_hi, src_scc op_sel:[0,0,0] op_sel_hi:[1,1,1]
756 v_pk_mad_i16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1]
780 v_pk_mad_u16 v5, ttmp15, src_scc, ttmp15
795 v_pk_mad_u16 v5, -1, exec_hi, src_scc op_sel:[0,0,0] op_sel_hi:[1,1,1]
801 v_pk_mad_u16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1]
825 v_pk_max_f16 v5, ttmp15, src_scc
846 v_pk_max_f16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] neg_lo:[0,0] neg_hi:[0,0]
870 v_pk_max_i16 v5, ttmp15, src_scc
891 v_pk_max_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
915 v_pk_max_u16 v5, ttmp15, src_scc
936 v_pk_max_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
960 v_pk_min_f16 v5, ttmp15, src_scc
981 v_pk_min_f16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] neg_lo:[0,0] neg_hi:[0,0]
1005 v_pk_min_i16 v5, ttmp15, src_scc
1026 v_pk_min_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
1050 v_pk_min_u16 v5, ttmp15, src_scc
1071 v_pk_min_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
1095 v_pk_mul_f16 v5, ttmp15, src_scc
1116 v_pk_mul_f16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] neg_lo:[0,0] neg_hi:[0,0]
1140 v_pk_mul_lo_u16 v5, ttmp15, src_scc
1161 v_pk_mul_lo_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
1185 v_pk_sub_i16 v5, ttmp15, src_scc
1206 v_pk_sub_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]
1230 v_pk_sub_u16 v5, ttmp15, src_scc
1251 v_pk_sub_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1]