Lines Matching full:addr

3 …eck-access-address=1 -S -passes=msan 2>&1 | FileCheck %s --check-prefixes=ADDR --implicit-check-no…
19 ; ADDR-LABEL: @load.v1i32(
20 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
21 ; ADDR-NEXT:    call void @llvm.donothing()
22 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
23 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0:![0-9]+]]
24 ; ADDR:       2:
25 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3:[0-9]+]]
26 ; ADDR-NEXT:    unreachable
27 ; ADDR:       3:
28 ; ADDR-NEXT:    [[TMP4:%.*]] = load <1 x i32>, ptr [[P:%.*]], align 4
29 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
30 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
31 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
32 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <1 x i32>, ptr [[TMP7]], align 4
33 ; ADDR-NEXT:    ret void
61 ; ADDR-LABEL: @load.v2i32(
62 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
63 ; ADDR-NEXT:    call void @llvm.donothing()
64 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
65 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
66 ; ADDR:       2:
67 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
68 ; ADDR-NEXT:    unreachable
69 ; ADDR:       3:
70 ; ADDR-NEXT:    [[TMP4:%.*]] = load <2 x i32>, ptr [[P:%.*]], align 8
71 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
72 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
73 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
74 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <2 x i32>, ptr [[TMP7]], align 8
75 ; ADDR-NEXT:    ret void
103 ; ADDR-LABEL: @load.v4i32(
104 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
105 ; ADDR-NEXT:    call void @llvm.donothing()
106 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
107 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
108 ; ADDR:       2:
109 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
110 ; ADDR-NEXT:    unreachable
111 ; ADDR:       3:
112 ; ADDR-NEXT:    [[TMP4:%.*]] = load <4 x i32>, ptr [[P:%.*]], align 16
113 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
114 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
115 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
116 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <4 x i32>, ptr [[TMP7]], align 16
117 ; ADDR-NEXT:    ret void
145 ; ADDR-LABEL: @load.v8i32(
146 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
147 ; ADDR-NEXT:    call void @llvm.donothing()
148 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
149 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
150 ; ADDR:       2:
151 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
152 ; ADDR-NEXT:    unreachable
153 ; ADDR:       3:
154 ; ADDR-NEXT:    [[TMP4:%.*]] = load <8 x i32>, ptr [[P:%.*]], align 32
155 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
156 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
157 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
158 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <8 x i32>, ptr [[TMP7]], align 32
159 ; ADDR-NEXT:    ret void
187 ; ADDR-LABEL: @load.v16i32(
188 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
189 ; ADDR-NEXT:    call void @llvm.donothing()
190 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
191 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
192 ; ADDR:       2:
193 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
194 ; ADDR-NEXT:    unreachable
195 ; ADDR:       3:
196 ; ADDR-NEXT:    [[TMP4:%.*]] = load <16 x i32>, ptr [[P:%.*]], align 64
197 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
198 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
199 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
200 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <16 x i32>, ptr [[TMP7]], align 64
201 ; ADDR-NEXT:    ret void
230 ; ADDR-LABEL: @store.v1i32(
231 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
232 ; ADDR-NEXT:    call void @llvm.donothing()
233 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
234 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
235 ; ADDR:       2:
236 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
237 ; ADDR-NEXT:    unreachable
238 ; ADDR:       3:
239 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
240 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
241 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
242 ; ADDR-NEXT:    store <1 x i32> zeroinitializer, ptr [[TMP6]], align 4
243 ; ADDR-NEXT:    store <1 x i32> zeroinitializer, ptr [[P]], align 4
244 ; ADDR-NEXT:    ret void
271 ; ADDR-LABEL: @store.v2i32(
272 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
273 ; ADDR-NEXT:    call void @llvm.donothing()
274 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
275 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
276 ; ADDR:       2:
277 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
278 ; ADDR-NEXT:    unreachable
279 ; ADDR:       3:
280 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
281 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
282 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
283 ; ADDR-NEXT:    store <2 x i32> zeroinitializer, ptr [[TMP6]], align 8
284 ; ADDR-NEXT:    store <2 x i32> zeroinitializer, ptr [[P]], align 8
285 ; ADDR-NEXT:    ret void
312 ; ADDR-LABEL: @store.v4i32(
313 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
314 ; ADDR-NEXT:    call void @llvm.donothing()
315 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
316 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
317 ; ADDR:       2:
318 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
319 ; ADDR-NEXT:    unreachable
320 ; ADDR:       3:
321 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
322 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
323 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
324 ; ADDR-NEXT:    store <4 x i32> zeroinitializer, ptr [[TMP6]], align 16
325 ; ADDR-NEXT:    store <4 x i32> zeroinitializer, ptr [[P]], align 16
326 ; ADDR-NEXT:    ret void
353 ; ADDR-LABEL: @store.v8i32(
354 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
355 ; ADDR-NEXT:    call void @llvm.donothing()
356 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
357 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
358 ; ADDR:       2:
359 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
360 ; ADDR-NEXT:    unreachable
361 ; ADDR:       3:
362 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
363 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
364 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
365 ; ADDR-NEXT:    store <8 x i32> zeroinitializer, ptr [[TMP6]], align 32
366 ; ADDR-NEXT:    store <8 x i32> zeroinitializer, ptr [[P]], align 32
367 ; ADDR-NEXT:    ret void
394 ; ADDR-LABEL: @store.v16i32(
395 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
396 ; ADDR-NEXT:    call void @llvm.donothing()
397 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
398 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
399 ; ADDR:       2:
400 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
401 ; ADDR-NEXT:    unreachable
402 ; ADDR:       3:
403 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
404 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
405 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
406 ; ADDR-NEXT:    store <16 x i32> zeroinitializer, ptr [[TMP6]], align 64
407 ; ADDR-NEXT:    store <16 x i32> zeroinitializer, ptr [[P]], align 64
408 ; ADDR-NEXT:    ret void
435 ; ADDR-LABEL: @load.nxv1i32(
436 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
437 ; ADDR-NEXT:    call void @llvm.donothing()
438 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
439 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
440 ; ADDR:       2:
441 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
442 ; ADDR-NEXT:    unreachable
443 ; ADDR:       3:
444 ; ADDR-NEXT:    [[TMP4:%.*]] = load <vscale x 1 x i32>, ptr [[P:%.*]], align 4
445 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
446 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
447 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
448 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <vscale x 1 x i32>, ptr [[TMP7]], align 4
449 ; ADDR-NEXT:    ret void
477 ; ADDR-LABEL: @load.nxv2i32(
478 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
479 ; ADDR-NEXT:    call void @llvm.donothing()
480 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
481 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
482 ; ADDR:       2:
483 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
484 ; ADDR-NEXT:    unreachable
485 ; ADDR:       3:
486 ; ADDR-NEXT:    [[TMP4:%.*]] = load <vscale x 2 x i32>, ptr [[P:%.*]], align 8
487 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
488 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
489 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
490 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <vscale x 2 x i32>, ptr [[TMP7]], align 8
491 ; ADDR-NEXT:    ret void
519 ; ADDR-LABEL: @load.nxv4i32(
520 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
521 ; ADDR-NEXT:    call void @llvm.donothing()
522 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
523 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
524 ; ADDR:       2:
525 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
526 ; ADDR-NEXT:    unreachable
527 ; ADDR:       3:
528 ; ADDR-NEXT:    [[TMP4:%.*]] = load <vscale x 4 x i32>, ptr [[P:%.*]], align 16
529 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
530 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
531 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
532 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <vscale x 4 x i32>, ptr [[TMP7]], align 16
533 ; ADDR-NEXT:    ret void
561 ; ADDR-LABEL: @load.nxv8i32(
562 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
563 ; ADDR-NEXT:    call void @llvm.donothing()
564 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
565 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
566 ; ADDR:       2:
567 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
568 ; ADDR-NEXT:    unreachable
569 ; ADDR:       3:
570 ; ADDR-NEXT:    [[TMP4:%.*]] = load <vscale x 8 x i32>, ptr [[P:%.*]], align 32
571 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
572 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
573 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
574 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <vscale x 8 x i32>, ptr [[TMP7]], align 32
575 ; ADDR-NEXT:    ret void
603 ; ADDR-LABEL: @load.nxv16i32(
604 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
605 ; ADDR-NEXT:    call void @llvm.donothing()
606 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
607 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
608 ; ADDR:       2:
609 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
610 ; ADDR-NEXT:    unreachable
611 ; ADDR:       3:
612 ; ADDR-NEXT:    [[TMP4:%.*]] = load <vscale x 16 x i32>, ptr [[P:%.*]], align 64
613 ; ADDR-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[P]] to i64
614 ; ADDR-NEXT:    [[TMP6:%.*]] = xor i64 [[TMP5]], 87960930222080
615 ; ADDR-NEXT:    [[TMP7:%.*]] = inttoptr i64 [[TMP6]] to ptr
616 ; ADDR-NEXT:    [[_MSLD:%.*]] = load <vscale x 16 x i32>, ptr [[TMP7]], align 64
617 ; ADDR-NEXT:    ret void
646 ; ADDR-LABEL: @store.nxv1i32(
647 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
648 ; ADDR-NEXT:    call void @llvm.donothing()
649 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
650 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
651 ; ADDR:       2:
652 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
653 ; ADDR-NEXT:    unreachable
654 ; ADDR:       3:
655 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
656 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
657 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
658 ; ADDR-NEXT:    store <vscale x 1 x i32> zeroinitializer, ptr [[TMP6]], align 4
659 ; ADDR-NEXT:    store <vscale x 1 x i32> zeroinitializer, ptr [[P]], align 4
660 ; ADDR-NEXT:    ret void
706 ; ADDR-LABEL: @store.nxv2i32(
707 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
708 ; ADDR-NEXT:    call void @llvm.donothing()
709 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
710 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
711 ; ADDR:       2:
712 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
713 ; ADDR-NEXT:    unreachable
714 ; ADDR:       3:
715 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
716 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
717 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
718 ; ADDR-NEXT:    store <vscale x 2 x i32> zeroinitializer, ptr [[TMP6]], align 8
719 ; ADDR-NEXT:    store <vscale x 2 x i32> zeroinitializer, ptr [[P]], align 8
720 ; ADDR-NEXT:    ret void
766 ; ADDR-LABEL: @store.nxv4i32(
767 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
768 ; ADDR-NEXT:    call void @llvm.donothing()
769 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
770 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
771 ; ADDR:       2:
772 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
773 ; ADDR-NEXT:    unreachable
774 ; ADDR:       3:
775 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
776 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
777 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
778 ; ADDR-NEXT:    store <vscale x 4 x i32> zeroinitializer, ptr [[TMP6]], align 16
779 ; ADDR-NEXT:    store <vscale x 4 x i32> zeroinitializer, ptr [[P]], align 16
780 ; ADDR-NEXT:    ret void
826 ; ADDR-LABEL: @store.nxv8i32(
827 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
828 ; ADDR-NEXT:    call void @llvm.donothing()
829 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
830 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
831 ; ADDR:       2:
832 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
833 ; ADDR-NEXT:    unreachable
834 ; ADDR:       3:
835 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
836 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
837 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
838 ; ADDR-NEXT:    store <vscale x 8 x i32> zeroinitializer, ptr [[TMP6]], align 32
839 ; ADDR-NEXT:    store <vscale x 8 x i32> zeroinitializer, ptr [[P]], align 32
840 ; ADDR-NEXT:    ret void
886 ; ADDR-LABEL: @store.nxv16i32(
887 ; ADDR-NEXT:    [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
888 ; ADDR-NEXT:    call void @llvm.donothing()
889 ; ADDR-NEXT:    [[_MSCMP:%.*]] = icmp ne i64 [[TMP1]], 0
890 ; ADDR-NEXT:    br i1 [[_MSCMP]], label [[TMP2:%.*]], label [[TMP3:%.*]], !prof [[PROF0]]
891 ; ADDR:       2:
892 ; ADDR-NEXT:    call void @__msan_warning_noreturn() #[[ATTR3]]
893 ; ADDR-NEXT:    unreachable
894 ; ADDR:       3:
895 ; ADDR-NEXT:    [[TMP4:%.*]] = ptrtoint ptr [[P:%.*]] to i64
896 ; ADDR-NEXT:    [[TMP5:%.*]] = xor i64 [[TMP4]], 87960930222080
897 ; ADDR-NEXT:    [[TMP6:%.*]] = inttoptr i64 [[TMP5]] to ptr
898 ; ADDR-NEXT:    store <vscale x 16 x i32> zeroinitializer, ptr [[TMP6]], align 64
899 ; ADDR-NEXT:    store <vscale x 16 x i32> zeroinitializer, ptr [[P]], align 64
900 ; ADDR-NEXT:    ret void