Lines Matching refs:relaxed
1 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+relaxed-simd | FileCheck %s --check-prefixes=CHECK,SLOW
2 ; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+simd128,+relaxed-simd -fast-isel | FileCheck %s
174 declare <16 x i8> @llvm.wasm.relaxed.laneselect.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
176 %v = call <16 x i8> @llvm.wasm.relaxed.laneselect.v16i8(
186 declare <16 x i8> @llvm.wasm.relaxed.swizzle(<16 x i8>, <16 x i8>)
188 %a = call <16 x i8> @llvm.wasm.relaxed.swizzle(<16 x i8> %x, <16 x i8> %y)
350 declare <8 x i16> @llvm.wasm.relaxed.laneselect.v8i16(<8 x i16>, <8 x i16>, <8 x i16>)
352 %v = call <8 x i16> @llvm.wasm.relaxed.laneselect.v8i16(
362 declare <8 x i16> @llvm.wasm.relaxed.q15mulr.signed(<8 x i16>, <8 x i16>)
364 %v = call <8 x i16> @llvm.wasm.relaxed.q15mulr.signed(
374 declare <8 x i16> @llvm.wasm.relaxed.dot.i8x16.i7x16.signed(<16 x i8>, <16 x i8>)
376 %v = call <8 x i16> @llvm.wasm.relaxed.dot.i8x16.i7x16.signed(
532 declare <4 x i32> @llvm.wasm.relaxed.laneselect.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
534 %v = call <4 x i32> @llvm.wasm.relaxed.laneselect.v4i32(
545 declare <4 x i32> @llvm.wasm.relaxed.trunc.signed(<4 x float>)
547 %a = call <4 x i32> @llvm.wasm.relaxed.trunc.signed(<4 x float> %x)
556 declare <4 x i32> @llvm.wasm.relaxed.trunc.unsigned(<4 x float>)
558 %a = call <4 x i32> @llvm.wasm.relaxed.trunc.unsigned(<4 x float> %x)
566 declare <4 x i32> @llvm.wasm.relaxed.trunc.signed.zero(<2 x double>)
568 %a = call <4 x i32> @llvm.wasm.relaxed.trunc.signed.zero(<2 x double> %x)
576 declare <4 x i32> @llvm.wasm.relaxed.trunc.unsigned.zero(<2 x double>)
578 %a = call <4 x i32> @llvm.wasm.relaxed.trunc.unsigned.zero(<2 x double> %x)
586 declare <4 x i32> @llvm.wasm.relaxed.dot.i8x16.i7x16.add.signed(
590 %v = call <4 x i32> @llvm.wasm.relaxed.dot.i8x16.i7x16.add.signed(
645 declare <2 x i64> @llvm.wasm.relaxed.laneselect.v2i64(<2 x i64>, <2 x i64>, <2 x i64>)
647 %v = call <2 x i64> @llvm.wasm.relaxed.laneselect.v2i64(
752 declare <4 x float> @llvm.wasm.relaxed.madd.v4f32(<4 x float>, <4 x float>, <4 x float>)
754 %v = call <4 x float> @llvm.wasm.relaxed.madd.v4f32(
764 declare <4 x float> @llvm.wasm.relaxed.nmadd.v4f32(<4 x float>, <4 x float>, <4 x float>)
766 %v = call <4 x float> @llvm.wasm.relaxed.nmadd.v4f32(
776 declare <4 x float> @llvm.wasm.relaxed.min.v4f32(<4 x float>, <4 x float>)
778 %v = call <4 x float> @llvm.wasm.relaxed.min.v4f32(
788 declare <4 x float> @llvm.wasm.relaxed.max.v4f32(<4 x float>, <4 x float>)
790 %v = call <4 x float> @llvm.wasm.relaxed.max.v4f32(
800 declare <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32(<8 x i16>, <8 x i16>,
804 %v = call <4 x float> @llvm.wasm.relaxed.dot.bf16x8.add.f32(
909 declare <2 x double> @llvm.wasm.relaxed.madd.v2f64(
912 %v = call <2 x double> @llvm.wasm.relaxed.madd.v2f64(
922 declare <2 x double> @llvm.wasm.relaxed.nmadd.v2f64(
925 %v = call <2 x double> @llvm.wasm.relaxed.nmadd.v2f64(
935 declare <2 x double> @llvm.wasm.relaxed.min.v2f64(<2 x double>, <2 x double>)
937 %v = call <2 x double> @llvm.wasm.relaxed.min.v2f64(
947 declare <2 x double> @llvm.wasm.relaxed.max.v2f64(<2 x double>, <2 x double>)
949 %v = call <2 x double> @llvm.wasm.relaxed.max.v2f64(