Lines Matching full:be

3 …one-eabi -mattr=+mve,+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK-BE
12 ; CHECK-BE-LABEL: masked_v4i32:
13 ; CHECK-BE:       @ %bb.0: @ %entry
14 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
15 ; CHECK-BE-NEXT:    vpt.s32 gt, q1, zr
16 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0]
17 ; CHECK-BE-NEXT:    bx lr
63 ; CHECK-BE-LABEL: masked_v4i32_align1:
64 ; CHECK-BE:       @ %bb.0: @ %entry
65 ; CHECK-BE-NEXT:    .pad #4
66 ; CHECK-BE-NEXT:    sub sp, #4
67 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
68 ; CHECK-BE-NEXT:    vcmp.s32 gt, q1, zr
69 ; CHECK-BE-NEXT:    vmrs r2, p0
70 ; CHECK-BE-NEXT:    ubfx r1, r2, #12, #1
71 ; CHECK-BE-NEXT:    rsbs r3, r1, #0
72 ; CHECK-BE-NEXT:    movs r1, #0
73 ; CHECK-BE-NEXT:    bfi r1, r3, #0, #1
74 ; CHECK-BE-NEXT:    ubfx r3, r2, #8, #1
75 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
76 ; CHECK-BE-NEXT:    bfi r1, r3, #1, #1
77 ; CHECK-BE-NEXT:    ubfx r3, r2, #4, #1
78 ; CHECK-BE-NEXT:    and r2, r2, #1
79 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
80 ; CHECK-BE-NEXT:    bfi r1, r3, #2, #1
81 ; CHECK-BE-NEXT:    rsbs r2, r2, #0
82 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
83 ; CHECK-BE-NEXT:    lsls r2, r1, #28
84 ; CHECK-BE-NEXT:    itt mi
85 ; CHECK-BE-NEXT:    vmovmi r2, s4
86 ; CHECK-BE-NEXT:    strmi r2, [r0]
87 ; CHECK-BE-NEXT:    lsls r2, r1, #29
88 ; CHECK-BE-NEXT:    itt mi
89 ; CHECK-BE-NEXT:    vmovmi r2, s5
90 ; CHECK-BE-NEXT:    strmi r2, [r0, #4]
91 ; CHECK-BE-NEXT:    lsls r2, r1, #30
92 ; CHECK-BE-NEXT:    itt mi
93 ; CHECK-BE-NEXT:    vmovmi r2, s6
94 ; CHECK-BE-NEXT:    strmi r2, [r0, #8]
95 ; CHECK-BE-NEXT:    lsls r1, r1, #31
96 ; CHECK-BE-NEXT:    itt ne
97 ; CHECK-BE-NEXT:    vmovne r1, s7
98 ; CHECK-BE-NEXT:    strne r1, [r0, #12]
99 ; CHECK-BE-NEXT:    add sp, #4
100 ; CHECK-BE-NEXT:    bx lr
117 ; CHECK-BE-LABEL: masked_v4i32_pre:
118 ; CHECK-BE:       @ %bb.0: @ %entry
119 ; CHECK-BE-NEXT:    vldr d1, [sp]
120 ; CHECK-BE-NEXT:    vmov d0, r3, r2
121 ; CHECK-BE-NEXT:    vldrw.u32 q1, [r1]
122 ; CHECK-BE-NEXT:    vrev64.32 q2, q0
123 ; CHECK-BE-NEXT:    vpt.s32 gt, q2, zr
124 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0, #4]!
125 ; CHECK-BE-NEXT:    bx lr
144 ; CHECK-BE-LABEL: masked_v4i32_post:
145 ; CHECK-BE:       @ %bb.0: @ %entry
146 ; CHECK-BE-NEXT:    vldr d1, [sp]
147 ; CHECK-BE-NEXT:    vmov d0, r3, r2
148 ; CHECK-BE-NEXT:    vldrw.u32 q1, [r1]
149 ; CHECK-BE-NEXT:    vrev64.32 q2, q0
150 ; CHECK-BE-NEXT:    vpt.s32 gt, q2, zr
151 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0], #4
152 ; CHECK-BE-NEXT:    bx lr
169 ; CHECK-BE-LABEL: masked_v8i16:
170 ; CHECK-BE:       @ %bb.0: @ %entry
171 ; CHECK-BE-NEXT:    vrev64.16 q1, q0
172 ; CHECK-BE-NEXT:    vpt.s16 gt, q1, zr
173 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0]
174 ; CHECK-BE-NEXT:    bx lr
249 ; CHECK-BE-LABEL: masked_v8i16_align1:
250 ; CHECK-BE:       @ %bb.0: @ %entry
251 ; CHECK-BE-NEXT:    .pad #4
252 ; CHECK-BE-NEXT:    sub sp, #4
253 ; CHECK-BE-NEXT:    vrev64.16 q1, q0
254 ; CHECK-BE-NEXT:    vcmp.s16 gt, q1, zr
255 ; CHECK-BE-NEXT:    vmrs r1, p0
256 ; CHECK-BE-NEXT:    ubfx r2, r1, #14, #1
257 ; CHECK-BE-NEXT:    rsbs r3, r2, #0
258 ; CHECK-BE-NEXT:    movs r2, #0
259 ; CHECK-BE-NEXT:    bfi r2, r3, #0, #1
260 ; CHECK-BE-NEXT:    ubfx r3, r1, #12, #1
261 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
262 ; CHECK-BE-NEXT:    bfi r2, r3, #1, #1
263 ; CHECK-BE-NEXT:    ubfx r3, r1, #10, #1
264 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
265 ; CHECK-BE-NEXT:    bfi r2, r3, #2, #1
266 ; CHECK-BE-NEXT:    ubfx r3, r1, #8, #1
267 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
268 ; CHECK-BE-NEXT:    bfi r2, r3, #3, #1
269 ; CHECK-BE-NEXT:    ubfx r3, r1, #6, #1
270 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
271 ; CHECK-BE-NEXT:    bfi r2, r3, #4, #1
272 ; CHECK-BE-NEXT:    ubfx r3, r1, #4, #1
273 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
274 ; CHECK-BE-NEXT:    bfi r2, r3, #5, #1
275 ; CHECK-BE-NEXT:    ubfx r3, r1, #2, #1
276 ; CHECK-BE-NEXT:    and r1, r1, #1
277 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
278 ; CHECK-BE-NEXT:    bfi r2, r3, #6, #1
279 ; CHECK-BE-NEXT:    rsbs r1, r1, #0
280 ; CHECK-BE-NEXT:    bfi r2, r1, #7, #1
281 ; CHECK-BE-NEXT:    uxtb r1, r2
282 ; CHECK-BE-NEXT:    lsls r2, r2, #24
283 ; CHECK-BE-NEXT:    itt mi
284 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[0]
285 ; CHECK-BE-NEXT:    strhmi r2, [r0]
286 ; CHECK-BE-NEXT:    lsls r2, r1, #25
287 ; CHECK-BE-NEXT:    itt mi
288 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[1]
289 ; CHECK-BE-NEXT:    strhmi r2, [r0, #2]
290 ; CHECK-BE-NEXT:    lsls r2, r1, #26
291 ; CHECK-BE-NEXT:    itt mi
292 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[2]
293 ; CHECK-BE-NEXT:    strhmi r2, [r0, #4]
294 ; CHECK-BE-NEXT:    lsls r2, r1, #27
295 ; CHECK-BE-NEXT:    itt mi
296 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[3]
297 ; CHECK-BE-NEXT:    strhmi r2, [r0, #6]
298 ; CHECK-BE-NEXT:    lsls r2, r1, #28
299 ; CHECK-BE-NEXT:    itt mi
300 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[4]
301 ; CHECK-BE-NEXT:    strhmi r2, [r0, #8]
302 ; CHECK-BE-NEXT:    lsls r2, r1, #29
303 ; CHECK-BE-NEXT:    itt mi
304 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[5]
305 ; CHECK-BE-NEXT:    strhmi r2, [r0, #10]
306 ; CHECK-BE-NEXT:    lsls r2, r1, #30
307 ; CHECK-BE-NEXT:    itt mi
308 ; CHECK-BE-NEXT:    vmovmi.u16 r2, q1[6]
309 ; CHECK-BE-NEXT:    strhmi r2, [r0, #12]
310 ; CHECK-BE-NEXT:    lsls r1, r1, #31
311 ; CHECK-BE-NEXT:    itt ne
312 ; CHECK-BE-NEXT:    vmovne.u16 r1, q1[7]
313 ; CHECK-BE-NEXT:    strhne r1, [r0, #14]
314 ; CHECK-BE-NEXT:    add sp, #4
315 ; CHECK-BE-NEXT:    bx lr
332 ; CHECK-BE-LABEL: masked_v8i16_pre:
333 ; CHECK-BE:       @ %bb.0: @ %entry
334 ; CHECK-BE-NEXT:    vldr d1, [sp]
335 ; CHECK-BE-NEXT:    vmov d0, r3, r2
336 ; CHECK-BE-NEXT:    vldrh.u16 q1, [r1]
337 ; CHECK-BE-NEXT:    vrev64.16 q2, q0
338 ; CHECK-BE-NEXT:    vpt.s16 gt, q2, zr
339 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0, #4]!
340 ; CHECK-BE-NEXT:    bx lr
359 ; CHECK-BE-LABEL: masked_v8i16_post:
360 ; CHECK-BE:       @ %bb.0: @ %entry
361 ; CHECK-BE-NEXT:    vldr d1, [sp]
362 ; CHECK-BE-NEXT:    vmov d0, r3, r2
363 ; CHECK-BE-NEXT:    vldrh.u16 q1, [r1]
364 ; CHECK-BE-NEXT:    vrev64.16 q2, q0
365 ; CHECK-BE-NEXT:    vpt.s16 gt, q2, zr
366 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0], #4
367 ; CHECK-BE-NEXT:    bx lr
384 ; CHECK-BE-LABEL: masked_v16i8:
385 ; CHECK-BE:       @ %bb.0: @ %entry
386 ; CHECK-BE-NEXT:    vrev64.8 q1, q0
387 ; CHECK-BE-NEXT:    vpt.s8 gt, q1, zr
388 ; CHECK-BE-NEXT:    vstrbt.8 q1, [r0]
389 ; CHECK-BE-NEXT:    bx lr
406 ; CHECK-BE-LABEL: masked_v16i8_pre:
407 ; CHECK-BE:       @ %bb.0: @ %entry
408 ; CHECK-BE-NEXT:    vldr d1, [sp]
409 ; CHECK-BE-NEXT:    vmov d0, r3, r2
410 ; CHECK-BE-NEXT:    vldrb.u8 q1, [r1]
411 ; CHECK-BE-NEXT:    vrev64.8 q2, q0
412 ; CHECK-BE-NEXT:    vpt.s8 gt, q2, zr
413 ; CHECK-BE-NEXT:    vstrbt.8 q1, [r0, #4]!
414 ; CHECK-BE-NEXT:    bx lr
433 ; CHECK-BE-LABEL: masked_v16i8_post:
434 ; CHECK-BE:       @ %bb.0: @ %entry
435 ; CHECK-BE-NEXT:    vldr d1, [sp]
436 ; CHECK-BE-NEXT:    vmov d0, r3, r2
437 ; CHECK-BE-NEXT:    vldrb.u8 q1, [r1]
438 ; CHECK-BE-NEXT:    vrev64.8 q2, q0
439 ; CHECK-BE-NEXT:    vpt.s8 gt, q2, zr
440 ; CHECK-BE-NEXT:    vstrbt.8 q1, [r0], #4
441 ; CHECK-BE-NEXT:    bx lr
458 ; CHECK-BE-LABEL: masked_v4f32:
459 ; CHECK-BE:       @ %bb.0: @ %entry
460 ; CHECK-BE-NEXT:    vrev64.32 q2, q1
461 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
462 ; CHECK-BE-NEXT:    vpt.i32 ne, q2, zr
463 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0]
464 ; CHECK-BE-NEXT:    bx lr
510 ; CHECK-BE-LABEL: masked_v4f32_align1:
511 ; CHECK-BE:       @ %bb.0: @ %entry
512 ; CHECK-BE-NEXT:    .pad #4
513 ; CHECK-BE-NEXT:    sub sp, #4
514 ; CHECK-BE-NEXT:    vrev64.32 q2, q1
515 ; CHECK-BE-NEXT:    movs r1, #0
516 ; CHECK-BE-NEXT:    vcmp.i32 ne, q2, zr
517 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
518 ; CHECK-BE-NEXT:    vmrs r2, p0
519 ; CHECK-BE-NEXT:    ubfx r3, r2, #12, #1
520 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
521 ; CHECK-BE-NEXT:    bfi r1, r3, #0, #1
522 ; CHECK-BE-NEXT:    ubfx r3, r2, #8, #1
523 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
524 ; CHECK-BE-NEXT:    bfi r1, r3, #1, #1
525 ; CHECK-BE-NEXT:    ubfx r3, r2, #4, #1
526 ; CHECK-BE-NEXT:    and r2, r2, #1
527 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
528 ; CHECK-BE-NEXT:    bfi r1, r3, #2, #1
529 ; CHECK-BE-NEXT:    rsbs r2, r2, #0
530 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
531 ; CHECK-BE-NEXT:    lsls r2, r1, #28
532 ; CHECK-BE-NEXT:    itt mi
533 ; CHECK-BE-NEXT:    vmovmi r2, s4
534 ; CHECK-BE-NEXT:    strmi r2, [r0]
535 ; CHECK-BE-NEXT:    lsls r2, r1, #29
536 ; CHECK-BE-NEXT:    itt mi
537 ; CHECK-BE-NEXT:    vmovmi r2, s5
538 ; CHECK-BE-NEXT:    strmi r2, [r0, #4]
539 ; CHECK-BE-NEXT:    lsls r2, r1, #30
540 ; CHECK-BE-NEXT:    itt mi
541 ; CHECK-BE-NEXT:    vmovmi r2, s6
542 ; CHECK-BE-NEXT:    strmi r2, [r0, #8]
543 ; CHECK-BE-NEXT:    lsls r1, r1, #31
544 ; CHECK-BE-NEXT:    itt ne
545 ; CHECK-BE-NEXT:    vmovne r1, s7
546 ; CHECK-BE-NEXT:    strne r1, [r0, #12]
547 ; CHECK-BE-NEXT:    add sp, #4
548 ; CHECK-BE-NEXT:    bx lr
565 ; CHECK-BE-LABEL: masked_v4f32_pre:
566 ; CHECK-BE:       @ %bb.0: @ %entry
567 ; CHECK-BE-NEXT:    vldr d1, [sp]
568 ; CHECK-BE-NEXT:    vmov d0, r3, r2
569 ; CHECK-BE-NEXT:    vldrw.u32 q1, [r1]
570 ; CHECK-BE-NEXT:    vrev64.32 q2, q0
571 ; CHECK-BE-NEXT:    vpt.s32 gt, q2, zr
572 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0, #4]!
573 ; CHECK-BE-NEXT:    bx lr
592 ; CHECK-BE-LABEL: masked_v4f32_post:
593 ; CHECK-BE:       @ %bb.0: @ %entry
594 ; CHECK-BE-NEXT:    vldr d1, [sp]
595 ; CHECK-BE-NEXT:    vmov d0, r3, r2
596 ; CHECK-BE-NEXT:    vldrw.u32 q1, [r1]
597 ; CHECK-BE-NEXT:    vrev64.32 q2, q0
598 ; CHECK-BE-NEXT:    vpt.s32 gt, q2, zr
599 ; CHECK-BE-NEXT:    vstrwt.32 q1, [r0], #4
600 ; CHECK-BE-NEXT:    bx lr
617 ; CHECK-BE-LABEL: masked_v8f16:
618 ; CHECK-BE:       @ %bb.0: @ %entry
619 ; CHECK-BE-NEXT:    vrev64.16 q2, q1
620 ; CHECK-BE-NEXT:    vrev64.16 q1, q0
621 ; CHECK-BE-NEXT:    vpt.i16 ne, q2, zr
622 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0]
623 ; CHECK-BE-NEXT:    bx lr
742 ; CHECK-BE-LABEL: masked_v8f16_align1:
743 ; CHECK-BE:       @ %bb.0: @ %entry
744 ; CHECK-BE-NEXT:    .pad #36
745 ; CHECK-BE-NEXT:    sub sp, #36
746 ; CHECK-BE-NEXT:    vrev64.16 q2, q1
747 ; CHECK-BE-NEXT:    vrev64.16 q1, q0
748 ; CHECK-BE-NEXT:    vcmp.i16 ne, q2, zr
749 ; CHECK-BE-NEXT:    vmrs r1, p0
750 ; CHECK-BE-NEXT:    ubfx r2, r1, #14, #1
751 ; CHECK-BE-NEXT:    rsbs r3, r2, #0
752 ; CHECK-BE-NEXT:    movs r2, #0
753 ; CHECK-BE-NEXT:    bfi r2, r3, #0, #1
754 ; CHECK-BE-NEXT:    ubfx r3, r1, #12, #1
755 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
756 ; CHECK-BE-NEXT:    bfi r2, r3, #1, #1
757 ; CHECK-BE-NEXT:    ubfx r3, r1, #10, #1
758 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
759 ; CHECK-BE-NEXT:    bfi r2, r3, #2, #1
760 ; CHECK-BE-NEXT:    ubfx r3, r1, #8, #1
761 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
762 ; CHECK-BE-NEXT:    bfi r2, r3, #3, #1
763 ; CHECK-BE-NEXT:    ubfx r3, r1, #6, #1
764 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
765 ; CHECK-BE-NEXT:    bfi r2, r3, #4, #1
766 ; CHECK-BE-NEXT:    ubfx r3, r1, #4, #1
767 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
768 ; CHECK-BE-NEXT:    bfi r2, r3, #5, #1
769 ; CHECK-BE-NEXT:    ubfx r3, r1, #2, #1
770 ; CHECK-BE-NEXT:    and r1, r1, #1
771 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
772 ; CHECK-BE-NEXT:    bfi r2, r3, #6, #1
773 ; CHECK-BE-NEXT:    rsbs r1, r1, #0
774 ; CHECK-BE-NEXT:    bfi r2, r1, #7, #1
775 ; CHECK-BE-NEXT:    uxtb r1, r2
776 ; CHECK-BE-NEXT:    lsls r2, r2, #24
777 ; CHECK-BE-NEXT:    bmi .LBB16_9
778 ; CHECK-BE-NEXT:  @ %bb.1: @ %else
779 ; CHECK-BE-NEXT:    lsls r2, r1, #25
780 ; CHECK-BE-NEXT:    bmi .LBB16_10
781 ; CHECK-BE-NEXT:  .LBB16_2: @ %else2
782 ; CHECK-BE-NEXT:    lsls r2, r1, #26
783 ; CHECK-BE-NEXT:    bmi .LBB16_11
784 ; CHECK-BE-NEXT:  .LBB16_3: @ %else4
785 ; CHECK-BE-NEXT:    lsls r2, r1, #27
786 ; CHECK-BE-NEXT:    bmi .LBB16_12
787 ; CHECK-BE-NEXT:  .LBB16_4: @ %else6
788 ; CHECK-BE-NEXT:    lsls r2, r1, #28
789 ; CHECK-BE-NEXT:    bmi .LBB16_13
790 ; CHECK-BE-NEXT:  .LBB16_5: @ %else8
791 ; CHECK-BE-NEXT:    lsls r2, r1, #29
792 ; CHECK-BE-NEXT:    bmi .LBB16_14
793 ; CHECK-BE-NEXT:  .LBB16_6: @ %else10
794 ; CHECK-BE-NEXT:    lsls r2, r1, #30
795 ; CHECK-BE-NEXT:    bmi .LBB16_15
796 ; CHECK-BE-NEXT:  .LBB16_7: @ %else12
797 ; CHECK-BE-NEXT:    lsls r1, r1, #31
798 ; CHECK-BE-NEXT:    bne .LBB16_16
799 ; CHECK-BE-NEXT:  .LBB16_8: @ %else14
800 ; CHECK-BE-NEXT:    add sp, #36
801 ; CHECK-BE-NEXT:    bx lr
802 ; CHECK-BE-NEXT:  .LBB16_9: @ %cond.store
803 ; CHECK-BE-NEXT:    vstr.16 s4, [sp, #28]
804 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #28]
805 ; CHECK-BE-NEXT:    strh r2, [r0]
806 ; CHECK-BE-NEXT:    lsls r2, r1, #25
807 ; CHECK-BE-NEXT:    bpl .LBB16_2
808 ; CHECK-BE-NEXT:  .LBB16_10: @ %cond.store1
809 ; CHECK-BE-NEXT:    vmovx.f16 s0, s4
810 ; CHECK-BE-NEXT:    vstr.16 s0, [sp, #24]
811 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #24]
812 ; CHECK-BE-NEXT:    strh r2, [r0, #2]
813 ; CHECK-BE-NEXT:    lsls r2, r1, #26
814 ; CHECK-BE-NEXT:    bpl .LBB16_3
815 ; CHECK-BE-NEXT:  .LBB16_11: @ %cond.store3
816 ; CHECK-BE-NEXT:    vstr.16 s5, [sp, #20]
817 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #20]
818 ; CHECK-BE-NEXT:    strh r2, [r0, #4]
819 ; CHECK-BE-NEXT:    lsls r2, r1, #27
820 ; CHECK-BE-NEXT:    bpl .LBB16_4
821 ; CHECK-BE-NEXT:  .LBB16_12: @ %cond.store5
822 ; CHECK-BE-NEXT:    vmovx.f16 s0, s5
823 ; CHECK-BE-NEXT:    vstr.16 s0, [sp, #16]
824 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #16]
825 ; CHECK-BE-NEXT:    strh r2, [r0, #6]
826 ; CHECK-BE-NEXT:    lsls r2, r1, #28
827 ; CHECK-BE-NEXT:    bpl .LBB16_5
828 ; CHECK-BE-NEXT:  .LBB16_13: @ %cond.store7
829 ; CHECK-BE-NEXT:    vstr.16 s6, [sp, #12]
830 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #12]
831 ; CHECK-BE-NEXT:    strh r2, [r0, #8]
832 ; CHECK-BE-NEXT:    lsls r2, r1, #29
833 ; CHECK-BE-NEXT:    bpl .LBB16_6
834 ; CHECK-BE-NEXT:  .LBB16_14: @ %cond.store9
835 ; CHECK-BE-NEXT:    vmovx.f16 s0, s6
836 ; CHECK-BE-NEXT:    vstr.16 s0, [sp, #8]
837 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #8]
838 ; CHECK-BE-NEXT:    strh r2, [r0, #10]
839 ; CHECK-BE-NEXT:    lsls r2, r1, #30
840 ; CHECK-BE-NEXT:    bpl .LBB16_7
841 ; CHECK-BE-NEXT:  .LBB16_15: @ %cond.store11
842 ; CHECK-BE-NEXT:    vstr.16 s7, [sp, #4]
843 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #4]
844 ; CHECK-BE-NEXT:    strh r2, [r0, #12]
845 ; CHECK-BE-NEXT:    lsls r1, r1, #31
846 ; CHECK-BE-NEXT:    beq .LBB16_8
847 ; CHECK-BE-NEXT:  .LBB16_16: @ %cond.store13
848 ; CHECK-BE-NEXT:    vmovx.f16 s0, s7
849 ; CHECK-BE-NEXT:    vstr.16 s0, [sp]
850 ; CHECK-BE-NEXT:    ldrh.w r1, [sp]
851 ; CHECK-BE-NEXT:    strh r1, [r0, #14]
852 ; CHECK-BE-NEXT:    add sp, #36
853 ; CHECK-BE-NEXT:    bx lr
870 ; CHECK-BE-LABEL: masked_v8f16_pre:
871 ; CHECK-BE:       @ %bb.0: @ %entry
872 ; CHECK-BE-NEXT:    vldr d1, [sp]
873 ; CHECK-BE-NEXT:    vmov d0, r3, r2
874 ; CHECK-BE-NEXT:    vldrh.u16 q1, [r1]
875 ; CHECK-BE-NEXT:    vrev64.16 q2, q0
876 ; CHECK-BE-NEXT:    vpt.s16 gt, q2, zr
877 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0, #4]!
878 ; CHECK-BE-NEXT:    bx lr
897 ; CHECK-BE-LABEL: masked_v8f16_post:
898 ; CHECK-BE:       @ %bb.0: @ %entry
899 ; CHECK-BE-NEXT:    vldr d1, [sp]
900 ; CHECK-BE-NEXT:    vmov d0, r3, r2
901 ; CHECK-BE-NEXT:    vldrh.u16 q1, [r1]
902 ; CHECK-BE-NEXT:    vrev64.16 q2, q0
903 ; CHECK-BE-NEXT:    vpt.s16 gt, q2, zr
904 ; CHECK-BE-NEXT:    vstrht.16 q1, [r0], #4
905 ; CHECK-BE-NEXT:    bx lr
942 ; CHECK-BE-LABEL: masked_v2i64:
943 ; CHECK-BE:       @ %bb.0: @ %entry
944 ; CHECK-BE-NEXT:    .save {r7, lr}
945 ; CHECK-BE-NEXT:    push {r7, lr}
946 ; CHECK-BE-NEXT:    .pad #4
947 ; CHECK-BE-NEXT:    sub sp, #4
948 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
949 ; CHECK-BE-NEXT:    movs r1, #0
950 ; CHECK-BE-NEXT:    vmov r2, r3, d3
951 ; CHECK-BE-NEXT:    vmov r12, lr, d2
952 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
953 ; CHECK-BE-NEXT:    sbcs.w r2, r1, r2
954 ; CHECK-BE-NEXT:    csetm r2, lt
955 ; CHECK-BE-NEXT:    rsbs.w r3, lr, #0
956 ; CHECK-BE-NEXT:    sbcs.w r3, r1, r12
957 ; CHECK-BE-NEXT:    bfi r1, r2, #0, #1
958 ; CHECK-BE-NEXT:    csetm r2, lt
959 ; CHECK-BE-NEXT:    bfi r1, r2, #1, #1
960 ; CHECK-BE-NEXT:    lsls r2, r1, #30
961 ; CHECK-BE-NEXT:    it mi
962 ; CHECK-BE-NEXT:    vstrmi d0, [r0]
963 ; CHECK-BE-NEXT:    lsls r1, r1, #31
964 ; CHECK-BE-NEXT:    it ne
965 ; CHECK-BE-NEXT:    vstrne d1, [r0, #8]
966 ; CHECK-BE-NEXT:    add sp, #4
967 ; CHECK-BE-NEXT:    pop {r7, pc}
1001 ; CHECK-BE-LABEL: masked_v2f64:
1002 ; CHECK-BE:       @ %bb.0: @ %entry
1003 ; CHECK-BE-NEXT:    .save {r7, lr}
1004 ; CHECK-BE-NEXT:    push {r7, lr}
1005 ; CHECK-BE-NEXT:    .pad #4
1006 ; CHECK-BE-NEXT:    sub sp, #4
1007 ; CHECK-BE-NEXT:    vrev64.32 q2, q1
1008 ; CHECK-BE-NEXT:    movs r1, #0
1009 ; CHECK-BE-NEXT:    vmov r2, r3, d5
1010 ; CHECK-BE-NEXT:    vmov r12, lr, d4
1011 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
1012 ; CHECK-BE-NEXT:    sbcs.w r2, r1, r2
1013 ; CHECK-BE-NEXT:    csetm r2, lt
1014 ; CHECK-BE-NEXT:    rsbs.w r3, lr, #0
1015 ; CHECK-BE-NEXT:    sbcs.w r3, r1, r12
1016 ; CHECK-BE-NEXT:    bfi r1, r2, #0, #1
1017 ; CHECK-BE-NEXT:    csetm r2, lt
1018 ; CHECK-BE-NEXT:    bfi r1, r2, #1, #1
1019 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1020 ; CHECK-BE-NEXT:    it mi
1021 ; CHECK-BE-NEXT:    vstrmi d0, [r0]
1022 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1023 ; CHECK-BE-NEXT:    it ne
1024 ; CHECK-BE-NEXT:    vstrne d1, [r0, #8]
1025 ; CHECK-BE-NEXT:    add sp, #4
1026 ; CHECK-BE-NEXT:    pop {r7, pc}
1040 ; CHECK-BE-LABEL: masked_v4i16:
1041 ; CHECK-BE:       @ %bb.0: @ %entry
1042 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1043 ; CHECK-BE-NEXT:    vpt.s32 gt, q1, zr
1044 ; CHECK-BE-NEXT:    vstrht.32 q1, [r0]
1045 ; CHECK-BE-NEXT:    bx lr
1060 ; CHECK-BE-LABEL: masked_v4i8:
1061 ; CHECK-BE:       @ %bb.0: @ %entry
1062 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1063 ; CHECK-BE-NEXT:    vpt.s32 gt, q1, zr
1064 ; CHECK-BE-NEXT:    vstrbt.32 q1, [r0]
1065 ; CHECK-BE-NEXT:    bx lr
1080 ; CHECK-BE-LABEL: masked_v8i8:
1081 ; CHECK-BE:       @ %bb.0: @ %entry
1082 ; CHECK-BE-NEXT:    vrev64.16 q1, q0
1083 ; CHECK-BE-NEXT:    vpt.s16 gt, q1, zr
1084 ; CHECK-BE-NEXT:    vstrbt.16 q1, [r0]
1085 ; CHECK-BE-NEXT:    bx lr
1132 ; CHECK-BE-LABEL: masked_v4i16_align1:
1133 ; CHECK-BE:       @ %bb.0: @ %entry
1134 ; CHECK-BE-NEXT:    .pad #4
1135 ; CHECK-BE-NEXT:    sub sp, #4
1136 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1137 ; CHECK-BE-NEXT:    vcmp.s32 gt, q1, zr
1138 ; CHECK-BE-NEXT:    vmrs r2, p0
1139 ; CHECK-BE-NEXT:    ubfx r1, r2, #12, #1
1140 ; CHECK-BE-NEXT:    rsbs r3, r1, #0
1141 ; CHECK-BE-NEXT:    movs r1, #0
1142 ; CHECK-BE-NEXT:    bfi r1, r3, #0, #1
1143 ; CHECK-BE-NEXT:    ubfx r3, r2, #8, #1
1144 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
1145 ; CHECK-BE-NEXT:    bfi r1, r3, #1, #1
1146 ; CHECK-BE-NEXT:    ubfx r3, r2, #4, #1
1147 ; CHECK-BE-NEXT:    and r2, r2, #1
1148 ; CHECK-BE-NEXT:    rsbs r3, r3, #0
1149 ; CHECK-BE-NEXT:    bfi r1, r3, #2, #1
1150 ; CHECK-BE-NEXT:    rsbs r2, r2, #0
1151 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
1152 ; CHECK-BE-NEXT:    lsls r2, r1, #28
1153 ; CHECK-BE-NEXT:    itt mi
1154 ; CHECK-BE-NEXT:    vmovmi r2, s4
1155 ; CHECK-BE-NEXT:    strhmi r2, [r0]
1156 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1157 ; CHECK-BE-NEXT:    itt mi
1158 ; CHECK-BE-NEXT:    vmovmi r2, s5
1159 ; CHECK-BE-NEXT:    strhmi r2, [r0, #2]
1160 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1161 ; CHECK-BE-NEXT:    itt mi
1162 ; CHECK-BE-NEXT:    vmovmi r2, s6
1163 ; CHECK-BE-NEXT:    strhmi r2, [r0, #4]
1164 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1165 ; CHECK-BE-NEXT:    itt ne
1166 ; CHECK-BE-NEXT:    vmovne r1, s7
1167 ; CHECK-BE-NEXT:    strhne r1, [r0, #6]
1168 ; CHECK-BE-NEXT:    add sp, #4
1169 ; CHECK-BE-NEXT:    bx lr
1236 ; CHECK-BE-LABEL: masked_v4f16_align4:
1237 ; CHECK-BE:       @ %bb.0: @ %entry
1238 ; CHECK-BE-NEXT:    .pad #4
1239 ; CHECK-BE-NEXT:    sub sp, #4
1240 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1241 ; CHECK-BE-NEXT:    movs r1, #0
1242 ; CHECK-BE-NEXT:    vcmp.f32 s7, #0
1243 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s0, s4
1244 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1245 ; CHECK-BE-NEXT:    vcmp.f32 s6, #0
1246 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s1, s6
1247 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s0, s5
1248 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s1, s7
1249 ; CHECK-BE-NEXT:    csetm r2, gt
1250 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1251 ; CHECK-BE-NEXT:    vcmp.f32 s5, #0
1252 ; CHECK-BE-NEXT:    bfi r1, r2, #0, #1
1253 ; CHECK-BE-NEXT:    csetm r2, gt
1254 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1255 ; CHECK-BE-NEXT:    vcmp.f32 s4, #0
1256 ; CHECK-BE-NEXT:    bfi r1, r2, #1, #1
1257 ; CHECK-BE-NEXT:    csetm r2, gt
1258 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1259 ; CHECK-BE-NEXT:    bfi r1, r2, #2, #1
1260 ; CHECK-BE-NEXT:    csetm r2, gt
1261 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
1262 ; CHECK-BE-NEXT:    lsls r2, r1, #28
1263 ; CHECK-BE-NEXT:    bmi .LBB25_5
1264 ; CHECK-BE-NEXT:  @ %bb.1: @ %else
1265 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1266 ; CHECK-BE-NEXT:    bmi .LBB25_6
1267 ; CHECK-BE-NEXT:  .LBB25_2: @ %else2
1268 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1269 ; CHECK-BE-NEXT:    bmi .LBB25_7
1270 ; CHECK-BE-NEXT:  .LBB25_3: @ %else4
1271 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1272 ; CHECK-BE-NEXT:    bne .LBB25_8
1273 ; CHECK-BE-NEXT:  .LBB25_4: @ %else6
1274 ; CHECK-BE-NEXT:    add sp, #4
1275 ; CHECK-BE-NEXT:    bx lr
1276 ; CHECK-BE-NEXT:  .LBB25_5: @ %cond.store
1277 ; CHECK-BE-NEXT:    vstr.16 s0, [r0]
1278 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1279 ; CHECK-BE-NEXT:    bpl .LBB25_2
1280 ; CHECK-BE-NEXT:  .LBB25_6: @ %cond.store1
1281 ; CHECK-BE-NEXT:    vmovx.f16 s0, s0
1282 ; CHECK-BE-NEXT:    vstr.16 s0, [r0, #2]
1283 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1284 ; CHECK-BE-NEXT:    bpl .LBB25_3
1285 ; CHECK-BE-NEXT:  .LBB25_7: @ %cond.store3
1286 ; CHECK-BE-NEXT:    vstr.16 s1, [r0, #4]
1287 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1288 ; CHECK-BE-NEXT:    beq .LBB25_4
1289 ; CHECK-BE-NEXT:  .LBB25_8: @ %cond.store5
1290 ; CHECK-BE-NEXT:    vmovx.f16 s0, s1
1291 ; CHECK-BE-NEXT:    vstr.16 s0, [r0, #6]
1292 ; CHECK-BE-NEXT:    add sp, #4
1293 ; CHECK-BE-NEXT:    bx lr
1360 ; CHECK-BE-LABEL: masked_v4f16_align2:
1361 ; CHECK-BE:       @ %bb.0: @ %entry
1362 ; CHECK-BE-NEXT:    .pad #4
1363 ; CHECK-BE-NEXT:    sub sp, #4
1364 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1365 ; CHECK-BE-NEXT:    movs r1, #0
1366 ; CHECK-BE-NEXT:    vcmp.f32 s7, #0
1367 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s0, s4
1368 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1369 ; CHECK-BE-NEXT:    vcmp.f32 s6, #0
1370 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s1, s6
1371 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s0, s5
1372 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s1, s7
1373 ; CHECK-BE-NEXT:    csetm r2, gt
1374 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1375 ; CHECK-BE-NEXT:    vcmp.f32 s5, #0
1376 ; CHECK-BE-NEXT:    bfi r1, r2, #0, #1
1377 ; CHECK-BE-NEXT:    csetm r2, gt
1378 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1379 ; CHECK-BE-NEXT:    vcmp.f32 s4, #0
1380 ; CHECK-BE-NEXT:    bfi r1, r2, #1, #1
1381 ; CHECK-BE-NEXT:    csetm r2, gt
1382 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1383 ; CHECK-BE-NEXT:    bfi r1, r2, #2, #1
1384 ; CHECK-BE-NEXT:    csetm r2, gt
1385 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
1386 ; CHECK-BE-NEXT:    lsls r2, r1, #28
1387 ; CHECK-BE-NEXT:    bmi .LBB26_5
1388 ; CHECK-BE-NEXT:  @ %bb.1: @ %else
1389 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1390 ; CHECK-BE-NEXT:    bmi .LBB26_6
1391 ; CHECK-BE-NEXT:  .LBB26_2: @ %else2
1392 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1393 ; CHECK-BE-NEXT:    bmi .LBB26_7
1394 ; CHECK-BE-NEXT:  .LBB26_3: @ %else4
1395 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1396 ; CHECK-BE-NEXT:    bne .LBB26_8
1397 ; CHECK-BE-NEXT:  .LBB26_4: @ %else6
1398 ; CHECK-BE-NEXT:    add sp, #4
1399 ; CHECK-BE-NEXT:    bx lr
1400 ; CHECK-BE-NEXT:  .LBB26_5: @ %cond.store
1401 ; CHECK-BE-NEXT:    vstr.16 s0, [r0]
1402 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1403 ; CHECK-BE-NEXT:    bpl .LBB26_2
1404 ; CHECK-BE-NEXT:  .LBB26_6: @ %cond.store1
1405 ; CHECK-BE-NEXT:    vmovx.f16 s0, s0
1406 ; CHECK-BE-NEXT:    vstr.16 s0, [r0, #2]
1407 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1408 ; CHECK-BE-NEXT:    bpl .LBB26_3
1409 ; CHECK-BE-NEXT:  .LBB26_7: @ %cond.store3
1410 ; CHECK-BE-NEXT:    vstr.16 s1, [r0, #4]
1411 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1412 ; CHECK-BE-NEXT:    beq .LBB26_4
1413 ; CHECK-BE-NEXT:  .LBB26_8: @ %cond.store5
1414 ; CHECK-BE-NEXT:    vmovx.f16 s0, s1
1415 ; CHECK-BE-NEXT:    vstr.16 s0, [r0, #6]
1416 ; CHECK-BE-NEXT:    add sp, #4
1417 ; CHECK-BE-NEXT:    bx lr
1492 ; CHECK-BE-LABEL: masked_v4f16_align1:
1493 ; CHECK-BE:       @ %bb.0: @ %entry
1494 ; CHECK-BE-NEXT:    .pad #20
1495 ; CHECK-BE-NEXT:    sub sp, #20
1496 ; CHECK-BE-NEXT:    vrev64.32 q1, q0
1497 ; CHECK-BE-NEXT:    movs r1, #0
1498 ; CHECK-BE-NEXT:    vcmp.f32 s7, #0
1499 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s0, s4
1500 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1501 ; CHECK-BE-NEXT:    vcmp.f32 s6, #0
1502 ; CHECK-BE-NEXT:    vcvtb.f16.f32 s1, s6
1503 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s0, s5
1504 ; CHECK-BE-NEXT:    vcvtt.f16.f32 s1, s7
1505 ; CHECK-BE-NEXT:    csetm r2, gt
1506 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1507 ; CHECK-BE-NEXT:    vcmp.f32 s5, #0
1508 ; CHECK-BE-NEXT:    bfi r1, r2, #0, #1
1509 ; CHECK-BE-NEXT:    csetm r2, gt
1510 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1511 ; CHECK-BE-NEXT:    vcmp.f32 s4, #0
1512 ; CHECK-BE-NEXT:    bfi r1, r2, #1, #1
1513 ; CHECK-BE-NEXT:    csetm r2, gt
1514 ; CHECK-BE-NEXT:    vmrs APSR_nzcv, fpscr
1515 ; CHECK-BE-NEXT:    bfi r1, r2, #2, #1
1516 ; CHECK-BE-NEXT:    csetm r2, gt
1517 ; CHECK-BE-NEXT:    bfi r1, r2, #3, #1
1518 ; CHECK-BE-NEXT:    lsls r2, r1, #28
1519 ; CHECK-BE-NEXT:    bmi .LBB27_5
1520 ; CHECK-BE-NEXT:  @ %bb.1: @ %else
1521 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1522 ; CHECK-BE-NEXT:    bmi .LBB27_6
1523 ; CHECK-BE-NEXT:  .LBB27_2: @ %else2
1524 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1525 ; CHECK-BE-NEXT:    bmi .LBB27_7
1526 ; CHECK-BE-NEXT:  .LBB27_3: @ %else4
1527 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1528 ; CHECK-BE-NEXT:    bne .LBB27_8
1529 ; CHECK-BE-NEXT:  .LBB27_4: @ %else6
1530 ; CHECK-BE-NEXT:    add sp, #20
1531 ; CHECK-BE-NEXT:    bx lr
1532 ; CHECK-BE-NEXT:  .LBB27_5: @ %cond.store
1533 ; CHECK-BE-NEXT:    vstr.16 s0, [sp, #12]
1534 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #12]
1535 ; CHECK-BE-NEXT:    strh r2, [r0]
1536 ; CHECK-BE-NEXT:    lsls r2, r1, #29
1537 ; CHECK-BE-NEXT:    bpl .LBB27_2
1538 ; CHECK-BE-NEXT:  .LBB27_6: @ %cond.store1
1539 ; CHECK-BE-NEXT:    vmovx.f16 s0, s0
1540 ; CHECK-BE-NEXT:    vstr.16 s0, [sp, #8]
1541 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #8]
1542 ; CHECK-BE-NEXT:    strh r2, [r0, #2]
1543 ; CHECK-BE-NEXT:    lsls r2, r1, #30
1544 ; CHECK-BE-NEXT:    bpl .LBB27_3
1545 ; CHECK-BE-NEXT:  .LBB27_7: @ %cond.store3
1546 ; CHECK-BE-NEXT:    vstr.16 s1, [sp, #4]
1547 ; CHECK-BE-NEXT:    ldrh.w r2, [sp, #4]
1548 ; CHECK-BE-NEXT:    strh r2, [r0, #4]
1549 ; CHECK-BE-NEXT:    lsls r1, r1, #31
1550 ; CHECK-BE-NEXT:    beq .LBB27_4
1551 ; CHECK-BE-NEXT:  .LBB27_8: @ %cond.store5
1552 ; CHECK-BE-NEXT:    vmovx.f16 s0, s1
1553 ; CHECK-BE-NEXT:    vstr.16 s0, [sp]
1554 ; CHECK-BE-NEXT:    ldrh.w r1, [sp]
1555 ; CHECK-BE-NEXT:    strh r1, [r0, #6]
1556 ; CHECK-BE-NEXT:    add sp, #20
1557 ; CHECK-BE-NEXT:    bx lr