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4 define arm_aapcs_vfpcc <4 x i32> @zext_unscaled_i8_i32(ptr %base, ptr %offptr) {
11 %offs = load <4 x i32>, ptr %offptr, align 4
12 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
13 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
14 %gather.zext = zext <4 x i8> %gather to <4 x i32>
15 ret <4 x i32> %gather.zext
18 define arm_aapcs_vfpcc <4 x i32> @sext_unscaled_i8_i32(ptr %base, ptr %offptr) {
25 %offs = load <4 x i32>, ptr %offptr, align 4
26 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
27 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
28 %gather.sext = sext <4 x i8> %gather to <4 x i32>
29 ret <4 x i32> %gather.sext
32 define arm_aapcs_vfpcc <4 x i32> @zext_unscaled_i16_i32(ptr %base, ptr %offptr) {
39 %offs = load <4 x i32>, ptr %offptr, align 4
40 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
41 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
42 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
43 %gather.zext = zext <4 x i16> %gather to <4 x i32>
44 ret <4 x i32> %gather.zext
47 define arm_aapcs_vfpcc <4 x i32> @sext_unscaled_i16_i32(ptr %base, ptr %offptr) {
54 %offs = load <4 x i32>, ptr %offptr, align 4
55 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
56 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
57 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
58 %gather.sext = sext <4 x i16> %gather to <4 x i32>
59 ret <4 x i32> %gather.sext
62 define arm_aapcs_vfpcc <4 x i32> @unscaled_i32_i32(ptr %base, ptr %offptr) {
69 %offs = load <4 x i32>, ptr %offptr, align 4
70 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
71 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
72 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 true,…
73 ret <4 x i32> %gather
76 define arm_aapcs_vfpcc <4 x float> @unscaled_f32_i32(ptr %base, ptr %offptr) {
83 %offs = load <4 x i32>, ptr %offptr, align 4
84 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs
85 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
86 …%gather = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 tru…
87 ret <4 x float> %gather
90 define arm_aapcs_vfpcc <4 x i32> @unsigned_unscaled_b_i32_i16(ptr %base, ptr %offptr) {
97 %offs = load <4 x i16>, ptr %offptr, align 2
98 %offs.zext = zext <4 x i16> %offs to <4 x i32>
99 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
100 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
101 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 true,…
102 ret <4 x i32> %gather
105 define arm_aapcs_vfpcc <4 x i32> @signed_unscaled_i32_i16(ptr %base, ptr %offptr) {
112 %offs = load <4 x i16>, ptr %offptr, align 2
113 %offs.sext = sext <4 x i16> %offs to <4 x i32>
114 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
115 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
116 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 true,…
117 ret <4 x i32> %gather
120 define arm_aapcs_vfpcc <4 x float> @a_unsigned_unscaled_f32_i16(ptr %base, ptr %offptr) {
127 %offs = load <4 x i16>, ptr %offptr, align 2
128 %offs.zext = zext <4 x i16> %offs to <4 x i32>
129 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
130 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
131 …%gather = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 tru…
132 ret <4 x float> %gather
135 define arm_aapcs_vfpcc <4 x float> @b_signed_unscaled_f32_i16(ptr %base, ptr %offptr) {
142 %offs = load <4 x i16>, ptr %offptr, align 2
143 %offs.sext = sext <4 x i16> %offs to <4 x i32>
144 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
145 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
146 …%gather = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 tru…
147 ret <4 x float> %gather
150 define arm_aapcs_vfpcc <4 x i32> @zext_signed_unscaled_i16_i16(ptr %base, ptr %offptr) {
157 %offs = load <4 x i16>, ptr %offptr, align 2
158 %offs.sext = sext <4 x i16> %offs to <4 x i32>
159 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
160 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
161 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
162 %gather.zext = zext <4 x i16> %gather to <4 x i32>
163 ret <4 x i32> %gather.zext
166 define arm_aapcs_vfpcc <4 x i32> @sext_signed_unscaled_i16_i16(ptr %base, ptr %offptr) {
173 %offs = load <4 x i16>, ptr %offptr, align 2
174 %offs.sext = sext <4 x i16> %offs to <4 x i32>
175 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
176 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
177 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
178 %gather.sext = sext <4 x i16> %gather to <4 x i32>
179 ret <4 x i32> %gather.sext
182 define arm_aapcs_vfpcc <4 x i32> @zext_unsigned_unscaled_i16_i16(ptr %base, ptr %offptr) {
189 %offs = load <4 x i16>, ptr %offptr, align 2
190 %offs.zext = zext <4 x i16> %offs to <4 x i32>
191 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
192 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
193 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
194 %gather.zext = zext <4 x i16> %gather to <4 x i32>
195 ret <4 x i32> %gather.zext
198 define arm_aapcs_vfpcc <4 x i32> @sext_unsigned_unscaled_i16_i16(ptr %base, ptr %offptr) {
205 %offs = load <4 x i16>, ptr %offptr, align 2
206 %offs.zext = zext <4 x i16> %offs to <4 x i32>
207 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
208 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
209 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
210 %gather.sext = sext <4 x i16> %gather to <4 x i32>
211 ret <4 x i32> %gather.sext
214 define arm_aapcs_vfpcc <4 x i32> @zext_signed_unscaled_i8_i16(ptr %base, ptr %offptr) {
221 %offs = load <4 x i16>, ptr %offptr, align 2
222 %offs.sext = sext <4 x i16> %offs to <4 x i32>
223 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
224 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
225 %gather.zext = zext <4 x i8> %gather to <4 x i32>
226 ret <4 x i32> %gather.zext
229 define arm_aapcs_vfpcc <4 x i32> @sext_signed_unscaled_i8_i16(ptr %base, ptr %offptr) {
236 %offs = load <4 x i16>, ptr %offptr, align 2
237 %offs.sext = sext <4 x i16> %offs to <4 x i32>
238 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
239 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
240 %gather.sext = sext <4 x i8> %gather to <4 x i32>
241 ret <4 x i32> %gather.sext
244 define arm_aapcs_vfpcc <4 x i32> @zext_unsigned_unscaled_i8_i16(ptr %base, ptr %offptr) {
251 %offs = load <4 x i16>, ptr %offptr, align 2
252 %offs.zext = zext <4 x i16> %offs to <4 x i32>
253 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
254 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
255 %gather.zext = zext <4 x i8> %gather to <4 x i32>
256 ret <4 x i32> %gather.zext
259 define arm_aapcs_vfpcc <4 x i32> @sext_unsigned_unscaled_i8_i16(ptr %base, ptr %offptr) {
266 %offs = load <4 x i16>, ptr %offptr, align 2
267 %offs.zext = zext <4 x i16> %offs to <4 x i32>
268 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
269 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
270 %gather.sext = sext <4 x i8> %gather to <4 x i32>
271 ret <4 x i32> %gather.sext
274 define arm_aapcs_vfpcc <4 x i32> @unsigned_unscaled_b_i32_i8(ptr %base, ptr %offptr) {
281 %offs = load <4 x i8>, ptr %offptr, align 1
282 %offs.zext = zext <4 x i8> %offs to <4 x i32>
283 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
284 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
285 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 true,…
286 ret <4 x i32> %gather
289 define arm_aapcs_vfpcc <4 x i32> @signed_unscaled_i32_i8(ptr %base, ptr %offptr) {
296 %offs = load <4 x i8>, ptr %offptr, align 1
297 %offs.sext = sext <4 x i8> %offs to <4 x i32>
298 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
299 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
300 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 true,…
301 ret <4 x i32> %gather
304 define arm_aapcs_vfpcc <4 x float> @a_unsigned_unscaled_f32_i8(ptr %base, ptr %offptr) {
311 %offs = load <4 x i8>, ptr %offptr, align 1
312 %offs.zext = zext <4 x i8> %offs to <4 x i32>
313 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
314 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
315 …%gather = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 tru…
316 ret <4 x float> %gather
319 define arm_aapcs_vfpcc <4 x float> @b_signed_unscaled_f32_i8(ptr %base, ptr %offptr) {
326 %offs = load <4 x i8>, ptr %offptr, align 1
327 %offs.sext = sext <4 x i8> %offs to <4 x i32>
328 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
329 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
330 …%gather = call <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr> %ptrs, i32 4, <4 x i1> <i1 tru…
331 ret <4 x float> %gather
334 define arm_aapcs_vfpcc <4 x i32> @zext_signed_unscaled_i16_i8(ptr %base, ptr %offptr) {
341 %offs = load <4 x i8>, ptr %offptr, align 1
342 %offs.sext = sext <4 x i8> %offs to <4 x i32>
343 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
344 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
345 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
346 %gather.zext = zext <4 x i16> %gather to <4 x i32>
347 ret <4 x i32> %gather.zext
350 define arm_aapcs_vfpcc <4 x i32> @sext_signed_unscaled_i16_i8(ptr %base, ptr %offptr) {
357 %offs = load <4 x i8>, ptr %offptr, align 1
358 %offs.sext = sext <4 x i8> %offs to <4 x i32>
359 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
360 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
361 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
362 %gather.sext = sext <4 x i16> %gather to <4 x i32>
363 ret <4 x i32> %gather.sext
366 define arm_aapcs_vfpcc <4 x i32> @zext_unsigned_unscaled_i16_i8(ptr %base, ptr %offptr) {
373 %offs = load <4 x i8>, ptr %offptr, align 1
374 %offs.zext = zext <4 x i8> %offs to <4 x i32>
375 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
376 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
377 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
378 %gather.zext = zext <4 x i16> %gather to <4 x i32>
379 ret <4 x i32> %gather.zext
382 define arm_aapcs_vfpcc <4 x i32> @sext_unsigned_unscaled_i16_i8(ptr %base, ptr %offptr) {
389 %offs = load <4 x i8>, ptr %offptr, align 1
390 %offs.zext = zext <4 x i8> %offs to <4 x i32>
391 %byte_ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
392 %ptrs = bitcast <4 x ptr> %byte_ptrs to <4 x ptr>
393 …%gather = call <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr> %ptrs, i32 2, <4 x i1> <i1 true,…
394 %gather.sext = sext <4 x i16> %gather to <4 x i32>
395 ret <4 x i32> %gather.sext
398 define arm_aapcs_vfpcc <4 x i32> @zext_signed_unscaled_i8_i8(ptr %base, ptr %offptr) {
405 %offs = load <4 x i8>, ptr %offptr, align 1
406 %offs.sext = sext <4 x i8> %offs to <4 x i32>
407 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
408 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
409 %gather.zext = zext <4 x i8> %gather to <4 x i32>
410 ret <4 x i32> %gather.zext
413 define arm_aapcs_vfpcc <4 x i32> @sext_signed_unscaled_i8_i8(ptr %base, ptr %offptr) {
420 %offs = load <4 x i8>, ptr %offptr, align 1
421 %offs.sext = sext <4 x i8> %offs to <4 x i32>
422 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.sext
423 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
424 %gather.sext = sext <4 x i8> %gather to <4 x i32>
425 ret <4 x i32> %gather.sext
428 define arm_aapcs_vfpcc <4 x i32> @zext_unsigned_unscaled_i8_i8(ptr %base, ptr %offptr) {
435 %offs = load <4 x i8>, ptr %offptr, align 1
436 %offs.zext = zext <4 x i8> %offs to <4 x i32>
437 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
438 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
439 %gather.zext = zext <4 x i8> %gather to <4 x i32>
440 ret <4 x i32> %gather.zext
443 define arm_aapcs_vfpcc <4 x i32> @sext_unsigned_unscaled_i8_i8(ptr %base, ptr %offptr) {
450 %offs = load <4 x i8>, ptr %offptr, align 1
451 %offs.zext = zext <4 x i8> %offs to <4 x i32>
452 %ptrs = getelementptr inbounds i8, ptr %base, <4 x i32> %offs.zext
453 …%gather = call <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr> %ptrs, i32 1, <4 x i1> <i1 true, i…
454 %gather.sext = sext <4 x i8> %gather to <4 x i32>
455 ret <4 x i32> %gather.sext
458 ; VLDRW.u32 Qd, [P, 4]
459 define arm_aapcs_vfpcc <4 x i32> @qi4(<4 x ptr> %p) {
467 %g = getelementptr inbounds i32, <4 x ptr> %p, i32 4
468 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %g, i32 4, <4 x i1> <i1 true, i1…
469 ret <4 x i32> %gather
472 define arm_aapcs_vfpcc <4 x i32> @qi4_unaligned(<4 x ptr> %p) {
487 %g = getelementptr inbounds i32, <4 x ptr> %p, i32 4
488 …%gather = call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> %g, i32 1, <4 x i1> <i1 true, i1…
489 ret <4 x i32> %gather
492 declare <4 x i8> @llvm.masked.gather.v4i8.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x i8>)
493 declare <4 x i16> @llvm.masked.gather.v4i16.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x i16>)
494 declare <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x i32>)
495 declare <4 x half> @llvm.masked.gather.v4f16.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x half>)
496 declare <4 x float> @llvm.masked.gather.v4f32.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x float>)