fixed-vectors-int-buildvec.ll - OpenGrok cross reference for /llvm-project/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll

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2 ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV32,RV32-ONLY
5 ; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV64,RV64V,RV64V-ONLY
1343 ; RV32-ONLY-LABEL: buildvec_v16i8_loads_contigous:
1344 ; RV32-ONLY:       # %bb.0:
1345 ; RV32-ONLY-NEXT:    addi sp, sp, -16
1346 ; RV32-ONLY-NEXT:    .cfi_def_cfa_offset 16
1347 ; RV32-ONLY-NEXT:    sw s0, 12(sp) # 4-byte Folded Spill
1348 ; RV32-ONLY-NEXT:    .cfi_offset s0, -4
1349 ; RV32-ONLY-NEXT:    lbu a1, 0(a0)
1350 ; RV32-ONLY-NEXT:    lbu a2, 1(a0)
1351 ; RV32-ONLY-NEXT:    lbu a3, 2(a0)
1352 ; RV32-ONLY-NEXT:    lbu a4, 3(a0)
1353 ; RV32-ONLY-NEXT:    lbu a5, 4(a0)
1354 ; RV32-ONLY-NEXT:    lbu a6, 5(a0)
1355 ; RV32-ONLY-NEXT:    lbu a7, 6(a0)
1356 ; RV32-ONLY-NEXT:    lbu t0, 7(a0)
1357 ; RV32-ONLY-NEXT:    lbu t1, 8(a0)
1358 ; RV32-ONLY-NEXT:    lbu t2, 9(a0)
1359 ; RV32-ONLY-NEXT:    lbu t3, 10(a0)
1360 ; RV32-ONLY-NEXT:    lbu t4, 11(a0)
1361 ; RV32-ONLY-NEXT:    li t5, 255
1362 ; RV32-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
1363 ; RV32-ONLY-NEXT:    vmv.s.x v0, t5
1364 ; RV32-ONLY-NEXT:    lbu t5, 12(a0)
1365 ; RV32-ONLY-NEXT:    lbu t6, 13(a0)
1366 ; RV32-ONLY-NEXT:    lbu s0, 14(a0)
1367 ; RV32-ONLY-NEXT:    lbu a0, 15(a0)
1368 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
1369 ; RV32-ONLY-NEXT:    vmv.v.x v8, a1
1370 ; RV32-ONLY-NEXT:    vmv.v.x v9, t1
1371 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
1372 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t2
1373 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
1374 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t3
1375 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
1376 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t4
1377 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a5
1378 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t5
1379 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a6
1380 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t6
1381 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a7
1382 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, s0
1383 ; RV32-ONLY-NEXT:    vslide1down.vx v10, v8, t0
1384 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v9, a0
1385 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
1386 ; RV32-ONLY-NEXT:    lw s0, 12(sp) # 4-byte Folded Reload
1387 ; RV32-ONLY-NEXT:    .cfi_restore s0
1388 ; RV32-ONLY-NEXT:    addi sp, sp, 16
1389 ; RV32-ONLY-NEXT:    .cfi_def_cfa_offset 0
1390 ; RV32-ONLY-NEXT:    ret
1478 ; RV64V-ONLY-LABEL: buildvec_v16i8_loads_contigous:
1479 ; RV64V-ONLY:       # %bb.0:
1480 ; RV64V-ONLY-NEXT:    addi sp, sp, -16
1481 ; RV64V-ONLY-NEXT:    .cfi_def_cfa_offset 16
1482 ; RV64V-ONLY-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
1483 ; RV64V-ONLY-NEXT:    .cfi_offset s0, -8
1484 ; RV64V-ONLY-NEXT:    lbu a1, 0(a0)
1485 ; RV64V-ONLY-NEXT:    lbu a2, 1(a0)
1486 ; RV64V-ONLY-NEXT:    lbu a3, 2(a0)
1487 ; RV64V-ONLY-NEXT:    lbu a4, 3(a0)
1488 ; RV64V-ONLY-NEXT:    lbu a5, 4(a0)
1489 ; RV64V-ONLY-NEXT:    lbu a6, 5(a0)
1490 ; RV64V-ONLY-NEXT:    lbu a7, 6(a0)
1491 ; RV64V-ONLY-NEXT:    lbu t0, 7(a0)
1492 ; RV64V-ONLY-NEXT:    lbu t1, 8(a0)
1493 ; RV64V-ONLY-NEXT:    lbu t2, 9(a0)
1494 ; RV64V-ONLY-NEXT:    lbu t3, 10(a0)
1495 ; RV64V-ONLY-NEXT:    lbu t4, 11(a0)
1496 ; RV64V-ONLY-NEXT:    li t5, 255
1497 ; RV64V-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
1498 ; RV64V-ONLY-NEXT:    vmv.s.x v0, t5
1499 ; RV64V-ONLY-NEXT:    lbu t5, 12(a0)
1500 ; RV64V-ONLY-NEXT:    lbu t6, 13(a0)
1501 ; RV64V-ONLY-NEXT:    lbu s0, 14(a0)
1502 ; RV64V-ONLY-NEXT:    lbu a0, 15(a0)
1503 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
1504 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a1
1505 ; RV64V-ONLY-NEXT:    vmv.v.x v9, t1
1506 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
1507 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t2
1508 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
1509 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t3
1510 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
1511 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t4
1512 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a5
1513 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t5
1514 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a6
1515 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t6
1516 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a7
1517 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, s0
1518 ; RV64V-ONLY-NEXT:    vslide1down.vx v10, v8, t0
1519 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v9, a0
1520 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
1521 ; RV64V-ONLY-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
1522 ; RV64V-ONLY-NEXT:    .cfi_restore s0
1523 ; RV64V-ONLY-NEXT:    addi sp, sp, 16
1524 ; RV64V-ONLY-NEXT:    .cfi_def_cfa_offset 0
1525 ; RV64V-ONLY-NEXT:    ret
1717 ; RV32-ONLY-LABEL: buildvec_v16i8_loads_gather:
1718 ; RV32-ONLY:       # %bb.0:
1719 ; RV32-ONLY-NEXT:    addi sp, sp, -16
1720 ; RV32-ONLY-NEXT:    .cfi_def_cfa_offset 16
1721 ; RV32-ONLY-NEXT:    sw s0, 12(sp) # 4-byte Folded Spill
1722 ; RV32-ONLY-NEXT:    .cfi_offset s0, -4
1723 ; RV32-ONLY-NEXT:    lbu a1, 0(a0)
1724 ; RV32-ONLY-NEXT:    lbu a2, 1(a0)
1725 ; RV32-ONLY-NEXT:    lbu a3, 22(a0)
1726 ; RV32-ONLY-NEXT:    lbu a4, 31(a0)
1727 ; RV32-ONLY-NEXT:    lbu a5, 623(a0)
1728 ; RV32-ONLY-NEXT:    lbu a6, 44(a0)
1729 ; RV32-ONLY-NEXT:    lbu a7, 55(a0)
1730 ; RV32-ONLY-NEXT:    lbu t0, 75(a0)
1731 ; RV32-ONLY-NEXT:    lbu t1, 82(a0)
1732 ; RV32-ONLY-NEXT:    lbu t2, 154(a0)
1733 ; RV32-ONLY-NEXT:    lbu t3, 161(a0)
1734 ; RV32-ONLY-NEXT:    lbu t4, 163(a0)
1735 ; RV32-ONLY-NEXT:    li t5, 255
1736 ; RV32-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
1737 ; RV32-ONLY-NEXT:    vmv.s.x v0, t5
1738 ; RV32-ONLY-NEXT:    lbu t5, 93(a0)
1739 ; RV32-ONLY-NEXT:    lbu t6, 105(a0)
1740 ; RV32-ONLY-NEXT:    lbu s0, 124(a0)
1741 ; RV32-ONLY-NEXT:    lbu a0, 144(a0)
1742 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
1743 ; RV32-ONLY-NEXT:    vmv.v.x v8, a1
1744 ; RV32-ONLY-NEXT:    vmv.v.x v9, t1
1745 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
1746 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t5
1747 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
1748 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t6
1749 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
1750 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t3
1751 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a6
1752 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, s0
1753 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a7
1754 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t4
1755 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a5
1756 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a0
1757 ; RV32-ONLY-NEXT:    vslide1down.vx v10, v8, t0
1758 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v9, t2
1759 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
1760 ; RV32-ONLY-NEXT:    lw s0, 12(sp) # 4-byte Folded Reload
1761 ; RV32-ONLY-NEXT:    .cfi_restore s0
1762 ; RV32-ONLY-NEXT:    addi sp, sp, 16
1763 ; RV32-ONLY-NEXT:    .cfi_def_cfa_offset 0
1764 ; RV32-ONLY-NEXT:    ret
1852 ; RV64V-ONLY-LABEL: buildvec_v16i8_loads_gather:
1853 ; RV64V-ONLY:       # %bb.0:
1854 ; RV64V-ONLY-NEXT:    addi sp, sp, -16
1855 ; RV64V-ONLY-NEXT:    .cfi_def_cfa_offset 16
1856 ; RV64V-ONLY-NEXT:    sd s0, 8(sp) # 8-byte Folded Spill
1857 ; RV64V-ONLY-NEXT:    .cfi_offset s0, -8
1858 ; RV64V-ONLY-NEXT:    lbu a1, 0(a0)
1859 ; RV64V-ONLY-NEXT:    lbu a2, 1(a0)
1860 ; RV64V-ONLY-NEXT:    lbu a3, 22(a0)
1861 ; RV64V-ONLY-NEXT:    lbu a4, 31(a0)
1862 ; RV64V-ONLY-NEXT:    lbu a5, 623(a0)
1863 ; RV64V-ONLY-NEXT:    lbu a6, 44(a0)
1864 ; RV64V-ONLY-NEXT:    lbu a7, 55(a0)
1865 ; RV64V-ONLY-NEXT:    lbu t0, 75(a0)
1866 ; RV64V-ONLY-NEXT:    lbu t1, 82(a0)
1867 ; RV64V-ONLY-NEXT:    lbu t2, 154(a0)
1868 ; RV64V-ONLY-NEXT:    lbu t3, 161(a0)
1869 ; RV64V-ONLY-NEXT:    lbu t4, 163(a0)
1870 ; RV64V-ONLY-NEXT:    li t5, 255
1871 ; RV64V-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
1872 ; RV64V-ONLY-NEXT:    vmv.s.x v0, t5
1873 ; RV64V-ONLY-NEXT:    lbu t5, 93(a0)
1874 ; RV64V-ONLY-NEXT:    lbu t6, 105(a0)
1875 ; RV64V-ONLY-NEXT:    lbu s0, 124(a0)
1876 ; RV64V-ONLY-NEXT:    lbu a0, 144(a0)
1877 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
1878 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a1
1879 ; RV64V-ONLY-NEXT:    vmv.v.x v9, t1
1880 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
1881 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t5
1882 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
1883 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t6
1884 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
1885 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t3
1886 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a6
1887 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, s0
1888 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a7
1889 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t4
1890 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a5
1891 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a0
1892 ; RV64V-ONLY-NEXT:    vslide1down.vx v10, v8, t0
1893 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v9, t2
1894 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
1895 ; RV64V-ONLY-NEXT:    ld s0, 8(sp) # 8-byte Folded Reload
1896 ; RV64V-ONLY-NEXT:    .cfi_restore s0
1897 ; RV64V-ONLY-NEXT:    addi sp, sp, 16
1898 ; RV64V-ONLY-NEXT:    .cfi_def_cfa_offset 0
1899 ; RV64V-ONLY-NEXT:    ret
2098 ; RV32-ONLY-LABEL: buildvec_v16i8_undef_low_half:
2099 ; RV32-ONLY:       # %bb.0:
2100 ; RV32-ONLY-NEXT:    lbu a1, 82(a0)
2101 ; RV32-ONLY-NEXT:    lbu a2, 93(a0)
2102 ; RV32-ONLY-NEXT:    lbu a3, 105(a0)
2103 ; RV32-ONLY-NEXT:    lbu a4, 124(a0)
2104 ; RV32-ONLY-NEXT:    lbu a5, 144(a0)
2105 ; RV32-ONLY-NEXT:    lbu a6, 154(a0)
2106 ; RV32-ONLY-NEXT:    lbu a7, 161(a0)
2107 ; RV32-ONLY-NEXT:    lbu a0, 163(a0)
2108 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
2109 ; RV32-ONLY-NEXT:    vmv.v.x v8, a1
2110 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2111 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2112 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a7
2113 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2114 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a0
2115 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a5
2116 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a6
2117 ; RV32-ONLY-NEXT:    ret
2173 ; RV64V-ONLY-LABEL: buildvec_v16i8_undef_low_half:
2174 ; RV64V-ONLY:       # %bb.0:
2175 ; RV64V-ONLY-NEXT:    lbu a1, 82(a0)
2176 ; RV64V-ONLY-NEXT:    lbu a2, 93(a0)
2177 ; RV64V-ONLY-NEXT:    lbu a3, 105(a0)
2178 ; RV64V-ONLY-NEXT:    lbu a4, 124(a0)
2179 ; RV64V-ONLY-NEXT:    lbu a5, 144(a0)
2180 ; RV64V-ONLY-NEXT:    lbu a6, 154(a0)
2181 ; RV64V-ONLY-NEXT:    lbu a7, 161(a0)
2182 ; RV64V-ONLY-NEXT:    lbu a0, 163(a0)
2183 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
2184 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a1
2185 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2186 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2187 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a7
2188 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2189 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a0
2190 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a5
2191 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a6
2192 ; RV64V-ONLY-NEXT:    ret
2298 ; RV32-ONLY-LABEL: buildvec_v16i8_undef_high_half:
2299 ; RV32-ONLY:       # %bb.0:
2300 ; RV32-ONLY-NEXT:    lbu a1, 0(a0)
2301 ; RV32-ONLY-NEXT:    lbu a2, 1(a0)
2302 ; RV32-ONLY-NEXT:    lbu a3, 22(a0)
2303 ; RV32-ONLY-NEXT:    lbu a4, 31(a0)
2304 ; RV32-ONLY-NEXT:    lbu a5, 623(a0)
2305 ; RV32-ONLY-NEXT:    lbu a6, 44(a0)
2306 ; RV32-ONLY-NEXT:    lbu a7, 55(a0)
2307 ; RV32-ONLY-NEXT:    lbu a0, 75(a0)
2308 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
2309 ; RV32-ONLY-NEXT:    vmv.v.x v8, a1
2310 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2311 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2312 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2313 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a6
2314 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a7
2315 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a5
2316 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a0
2317 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v8, 8
2318 ; RV32-ONLY-NEXT:    ret
2374 ; RV64V-ONLY-LABEL: buildvec_v16i8_undef_high_half:
2375 ; RV64V-ONLY:       # %bb.0:
2376 ; RV64V-ONLY-NEXT:    lbu a1, 0(a0)
2377 ; RV64V-ONLY-NEXT:    lbu a2, 1(a0)
2378 ; RV64V-ONLY-NEXT:    lbu a3, 22(a0)
2379 ; RV64V-ONLY-NEXT:    lbu a4, 31(a0)
2380 ; RV64V-ONLY-NEXT:    lbu a5, 623(a0)
2381 ; RV64V-ONLY-NEXT:    lbu a6, 44(a0)
2382 ; RV64V-ONLY-NEXT:    lbu a7, 55(a0)
2383 ; RV64V-ONLY-NEXT:    lbu a0, 75(a0)
2384 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, ma
2385 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a1
2386 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2387 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2388 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2389 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a6
2390 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a7
2391 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a5
2392 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a0
2393 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v8, 8
2394 ; RV64V-ONLY-NEXT:    ret
2500 ; RV32-ONLY-LABEL: buildvec_v16i8_undef_edges:
2501 ; RV32-ONLY:       # %bb.0:
2502 ; RV32-ONLY-NEXT:    lbu a1, 623(a0)
2503 ; RV32-ONLY-NEXT:    lbu a2, 31(a0)
2504 ; RV32-ONLY-NEXT:    lbu a3, 44(a0)
2505 ; RV32-ONLY-NEXT:    lbu a4, 55(a0)
2506 ; RV32-ONLY-NEXT:    lbu a5, 75(a0)
2507 ; RV32-ONLY-NEXT:    li a6, 255
2508 ; RV32-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
2509 ; RV32-ONLY-NEXT:    vmv.s.x v0, a6
2510 ; RV32-ONLY-NEXT:    lbu a6, 82(a0)
2511 ; RV32-ONLY-NEXT:    lbu a7, 93(a0)
2512 ; RV32-ONLY-NEXT:    lbu t0, 105(a0)
2513 ; RV32-ONLY-NEXT:    lbu a0, 161(a0)
2514 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
2515 ; RV32-ONLY-NEXT:    vmv.v.x v8, a2
2516 ; RV32-ONLY-NEXT:    vmv.v.x v9, a6
2517 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2518 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a7
2519 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2520 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t0
2521 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a1
2522 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a0
2523 ; RV32-ONLY-NEXT:    vslide1down.vx v10, v8, a5
2524 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v9, 4
2525 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
2526 ; RV32-ONLY-NEXT:    ret
2587 ; RV64V-ONLY-LABEL: buildvec_v16i8_undef_edges:
2588 ; RV64V-ONLY:       # %bb.0:
2589 ; RV64V-ONLY-NEXT:    lbu a1, 623(a0)
2590 ; RV64V-ONLY-NEXT:    lbu a2, 31(a0)
2591 ; RV64V-ONLY-NEXT:    lbu a3, 44(a0)
2592 ; RV64V-ONLY-NEXT:    lbu a4, 55(a0)
2593 ; RV64V-ONLY-NEXT:    lbu a5, 75(a0)
2594 ; RV64V-ONLY-NEXT:    li a6, 255
2595 ; RV64V-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
2596 ; RV64V-ONLY-NEXT:    vmv.s.x v0, a6
2597 ; RV64V-ONLY-NEXT:    lbu a6, 82(a0)
2598 ; RV64V-ONLY-NEXT:    lbu a7, 93(a0)
2599 ; RV64V-ONLY-NEXT:    lbu t0, 105(a0)
2600 ; RV64V-ONLY-NEXT:    lbu a0, 161(a0)
2601 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
2602 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a2
2603 ; RV64V-ONLY-NEXT:    vmv.v.x v9, a6
2604 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2605 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a7
2606 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2607 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t0
2608 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a1
2609 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a0
2610 ; RV64V-ONLY-NEXT:    vslide1down.vx v10, v8, a5
2611 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v9, 4
2612 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
2613 ; RV64V-ONLY-NEXT:    ret
2734 ; RV32-ONLY-LABEL: buildvec_v16i8_loads_undef_scattered:
2735 ; RV32-ONLY:       # %bb.0:
2736 ; RV32-ONLY-NEXT:    lbu a1, 0(a0)
2737 ; RV32-ONLY-NEXT:    lbu a2, 1(a0)
2738 ; RV32-ONLY-NEXT:    lbu a3, 44(a0)
2739 ; RV32-ONLY-NEXT:    lbu a4, 55(a0)
2740 ; RV32-ONLY-NEXT:    lbu a5, 75(a0)
2741 ; RV32-ONLY-NEXT:    lbu a6, 82(a0)
2742 ; RV32-ONLY-NEXT:    lbu a7, 93(a0)
2743 ; RV32-ONLY-NEXT:    lbu t0, 124(a0)
2744 ; RV32-ONLY-NEXT:    li t1, 255
2745 ; RV32-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
2746 ; RV32-ONLY-NEXT:    vmv.s.x v0, t1
2747 ; RV32-ONLY-NEXT:    lbu t1, 144(a0)
2748 ; RV32-ONLY-NEXT:    lbu a0, 154(a0)
2749 ; RV32-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
2750 ; RV32-ONLY-NEXT:    vmv.v.x v8, a1
2751 ; RV32-ONLY-NEXT:    vmv.v.x v9, a6
2752 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2753 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a7
2754 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v8, 2
2755 ; RV32-ONLY-NEXT:    vslidedown.vi v9, v9, 2
2756 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2757 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t0
2758 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2759 ; RV32-ONLY-NEXT:    vslidedown.vi v9, v9, 1
2760 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v8, 1
2761 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, t1
2762 ; RV32-ONLY-NEXT:    vslide1down.vx v10, v8, a5
2763 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v9, a0
2764 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
2765 ; RV32-ONLY-NEXT:    ret
2828 ; RV64V-ONLY-LABEL: buildvec_v16i8_loads_undef_scattered:
2829 ; RV64V-ONLY:       # %bb.0:
2830 ; RV64V-ONLY-NEXT:    lbu a1, 0(a0)
2831 ; RV64V-ONLY-NEXT:    lbu a2, 1(a0)
2832 ; RV64V-ONLY-NEXT:    lbu a3, 44(a0)
2833 ; RV64V-ONLY-NEXT:    lbu a4, 55(a0)
2834 ; RV64V-ONLY-NEXT:    lbu a5, 75(a0)
2835 ; RV64V-ONLY-NEXT:    lbu a6, 82(a0)
2836 ; RV64V-ONLY-NEXT:    lbu a7, 93(a0)
2837 ; RV64V-ONLY-NEXT:    lbu t0, 124(a0)
2838 ; RV64V-ONLY-NEXT:    li t1, 255
2839 ; RV64V-ONLY-NEXT:    vsetivli zero, 1, e16, m1, ta, ma
2840 ; RV64V-ONLY-NEXT:    vmv.s.x v0, t1
2841 ; RV64V-ONLY-NEXT:    lbu t1, 144(a0)
2842 ; RV64V-ONLY-NEXT:    lbu a0, 154(a0)
2843 ; RV64V-ONLY-NEXT:    vsetivli zero, 16, e8, m1, ta, mu
2844 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a1
2845 ; RV64V-ONLY-NEXT:    vmv.v.x v9, a6
2846 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
2847 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a7
2848 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v8, 2
2849 ; RV64V-ONLY-NEXT:    vslidedown.vi v9, v9, 2
2850 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
2851 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t0
2852 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
2853 ; RV64V-ONLY-NEXT:    vslidedown.vi v9, v9, 1
2854 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v8, 1
2855 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, t1
2856 ; RV64V-ONLY-NEXT:    vslide1down.vx v10, v8, a5
2857 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v9, a0
2858 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v10, 8, v0.t
2859 ; RV64V-ONLY-NEXT:    ret
3009 ; RV32-ONLY-LABEL: buildvec_v8i8_pack:
3010 ; RV32-ONLY:       # %bb.0:
3011 ; RV32-ONLY-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
3012 ; RV32-ONLY-NEXT:    vmv.v.x v8, a0
3013 ; RV32-ONLY-NEXT:    vmv.v.x v9, a4
3014 ; RV32-ONLY-NEXT:    vmv.v.i v0, 15
3015 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3016 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a5
3017 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3018 ; RV32-ONLY-NEXT:    vslide1down.vx v9, v9, a6
3019 ; RV32-ONLY-NEXT:    vslide1down.vx v10, v8, a3
3020 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v9, a7
3021 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v10, 4, v0.t
3022 ; RV32-ONLY-NEXT:    ret
3062 ; RV64V-ONLY-LABEL: buildvec_v8i8_pack:
3063 ; RV64V-ONLY:       # %bb.0:
3064 ; RV64V-ONLY-NEXT:    vsetivli zero, 8, e8, mf2, ta, mu
3065 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a0
3066 ; RV64V-ONLY-NEXT:    vmv.v.x v9, a4
3067 ; RV64V-ONLY-NEXT:    vmv.v.i v0, 15
3068 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3069 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a5
3070 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3071 ; RV64V-ONLY-NEXT:    vslide1down.vx v9, v9, a6
3072 ; RV64V-ONLY-NEXT:    vslide1down.vx v10, v8, a3
3073 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v9, a7
3074 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v10, 4, v0.t
3075 ; RV64V-ONLY-NEXT:    ret
3143 ; RV32-ONLY-LABEL: buildvec_v6i8_pack:
3144 ; RV32-ONLY:       # %bb.0:
3145 ; RV32-ONLY-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
3146 ; RV32-ONLY-NEXT:    vmv.v.x v8, a0
3147 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3148 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3149 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
3150 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a4
3151 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a5
3152 ; RV32-ONLY-NEXT:    vslidedown.vi v8, v8, 2
3153 ; RV32-ONLY-NEXT:    ret
3188 ; RV64V-ONLY-LABEL: buildvec_v6i8_pack:
3189 ; RV64V-ONLY:       # %bb.0:
3190 ; RV64V-ONLY-NEXT:    vsetivli zero, 8, e8, mf2, ta, ma
3191 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a0
3192 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3193 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3194 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
3195 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a4
3196 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a5
3197 ; RV64V-ONLY-NEXT:    vslidedown.vi v8, v8, 2
3198 ; RV64V-ONLY-NEXT:    ret
3256 ; RV32-ONLY-LABEL: buildvec_v4i16_pack:
3257 ; RV32-ONLY:       # %bb.0:
3258 ; RV32-ONLY-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
3259 ; RV32-ONLY-NEXT:    vmv.v.x v8, a0
3260 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3261 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3262 ; RV32-ONLY-NEXT:    vslide1down.vx v8, v8, a3
3263 ; RV32-ONLY-NEXT:    ret
3287 ; RV64V-ONLY-LABEL: buildvec_v4i16_pack:
3288 ; RV64V-ONLY:       # %bb.0:
3289 ; RV64V-ONLY-NEXT:    vsetivli zero, 4, e16, mf2, ta, ma
3290 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a0
3291 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3292 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a2
3293 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a3
3294 ; RV64V-ONLY-NEXT:    ret
3343 ; RV64V-ONLY-LABEL: buildvec_v2i32_pack:
3344 ; RV64V-ONLY:       # %bb.0:
3345 ; RV64V-ONLY-NEXT:    vsetivli zero, 2, e32, mf2, ta, ma
3346 ; RV64V-ONLY-NEXT:    vmv.v.x v8, a0
3347 ; RV64V-ONLY-NEXT:    vslide1down.vx v8, v8, a1
3348 ; RV64V-ONLY-NEXT:    ret