Lines Matching +full:1 +full:- +full:d
2 ; RUN: llc -mtriple=riscv32 -mattr=+f,+d -target-abi ilp32d -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=RV32IFD %s
4 ; RUN: llc -mtriple=riscv64 -mattr=+f,+d -target-abi lp64d -verify-machineinstrs < %s \
5 ; RUN: | FileCheck -check-prefix=RV64IFD %s
19 ; RV32IFD-LABEL: explicit_register_f0:
21 ; RV32IFD-NEXT: fmv.d ft0, fa0
22 ; RV32IFD-NEXT: #APP
23 ; RV32IFD-NEXT: fcvt.w.d a0, ft0
24 ; RV32IFD-NEXT: #NO_APP
25 ; RV32IFD-NEXT: ret
27 ; RV64IFD-LABEL: explicit_register_f0:
29 ; RV64IFD-NEXT: fmv.d ft0, fa0
30 ; RV64IFD-NEXT: #APP
31 ; RV64IFD-NEXT: fcvt.w.d a0, ft0
32 ; RV64IFD-NEXT: #NO_APP
33 ; RV64IFD-NEXT: ret
34 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f0}"(double %a)
35 ret i32 %1
39 ; RV32IFD-LABEL: explicit_register_ft0:
41 ; RV32IFD-NEXT: fmv.d ft0, fa0
42 ; RV32IFD-NEXT: #APP
43 ; RV32IFD-NEXT: fcvt.w.d a0, ft0
44 ; RV32IFD-NEXT: #NO_APP
45 ; RV32IFD-NEXT: ret
47 ; RV64IFD-LABEL: explicit_register_ft0:
49 ; RV64IFD-NEXT: fmv.d ft0, fa0
50 ; RV64IFD-NEXT: #APP
51 ; RV64IFD-NEXT: fcvt.w.d a0, ft0
52 ; RV64IFD-NEXT: #NO_APP
53 ; RV64IFD-NEXT: ret
54 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft0}"(double %a)
55 ret i32 %1
59 ; RV32IFD-LABEL: explicit_register_f1:
61 ; RV32IFD-NEXT: fmv.d ft1, fa0
62 ; RV32IFD-NEXT: #APP
63 ; RV32IFD-NEXT: fcvt.w.d a0, ft1
64 ; RV32IFD-NEXT: #NO_APP
65 ; RV32IFD-NEXT: ret
67 ; RV64IFD-LABEL: explicit_register_f1:
69 ; RV64IFD-NEXT: fmv.d ft1, fa0
70 ; RV64IFD-NEXT: #APP
71 ; RV64IFD-NEXT: fcvt.w.d a0, ft1
72 ; RV64IFD-NEXT: #NO_APP
73 ; RV64IFD-NEXT: ret
74 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f1}"(double %a)
75 ret i32 %1
79 ; RV32IFD-LABEL: explicit_register_ft1:
81 ; RV32IFD-NEXT: fmv.d ft1, fa0
82 ; RV32IFD-NEXT: #APP
83 ; RV32IFD-NEXT: fcvt.w.d a0, ft1
84 ; RV32IFD-NEXT: #NO_APP
85 ; RV32IFD-NEXT: ret
87 ; RV64IFD-LABEL: explicit_register_ft1:
89 ; RV64IFD-NEXT: fmv.d ft1, fa0
90 ; RV64IFD-NEXT: #APP
91 ; RV64IFD-NEXT: fcvt.w.d a0, ft1
92 ; RV64IFD-NEXT: #NO_APP
93 ; RV64IFD-NEXT: ret
94 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft1}"(double %a)
95 ret i32 %1
99 ; RV32IFD-LABEL: explicit_register_f2:
101 ; RV32IFD-NEXT: fmv.d ft2, fa0
102 ; RV32IFD-NEXT: #APP
103 ; RV32IFD-NEXT: fcvt.w.d a0, ft2
104 ; RV32IFD-NEXT: #NO_APP
105 ; RV32IFD-NEXT: ret
107 ; RV64IFD-LABEL: explicit_register_f2:
109 ; RV64IFD-NEXT: fmv.d ft2, fa0
110 ; RV64IFD-NEXT: #APP
111 ; RV64IFD-NEXT: fcvt.w.d a0, ft2
112 ; RV64IFD-NEXT: #NO_APP
113 ; RV64IFD-NEXT: ret
114 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f2}"(double %a)
115 ret i32 %1
119 ; RV32IFD-LABEL: explicit_register_ft2:
121 ; RV32IFD-NEXT: fmv.d ft2, fa0
122 ; RV32IFD-NEXT: #APP
123 ; RV32IFD-NEXT: fcvt.w.d a0, ft2
124 ; RV32IFD-NEXT: #NO_APP
125 ; RV32IFD-NEXT: ret
127 ; RV64IFD-LABEL: explicit_register_ft2:
129 ; RV64IFD-NEXT: fmv.d ft2, fa0
130 ; RV64IFD-NEXT: #APP
131 ; RV64IFD-NEXT: fcvt.w.d a0, ft2
132 ; RV64IFD-NEXT: #NO_APP
133 ; RV64IFD-NEXT: ret
134 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft2}"(double %a)
135 ret i32 %1
139 ; RV32IFD-LABEL: explicit_register_f3:
141 ; RV32IFD-NEXT: fmv.d ft3, fa0
142 ; RV32IFD-NEXT: #APP
143 ; RV32IFD-NEXT: fcvt.w.d a0, ft3
144 ; RV32IFD-NEXT: #NO_APP
145 ; RV32IFD-NEXT: ret
147 ; RV64IFD-LABEL: explicit_register_f3:
149 ; RV64IFD-NEXT: fmv.d ft3, fa0
150 ; RV64IFD-NEXT: #APP
151 ; RV64IFD-NEXT: fcvt.w.d a0, ft3
152 ; RV64IFD-NEXT: #NO_APP
153 ; RV64IFD-NEXT: ret
154 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f3}"(double %a)
155 ret i32 %1
159 ; RV32IFD-LABEL: explicit_register_ft3:
161 ; RV32IFD-NEXT: fmv.d ft3, fa0
162 ; RV32IFD-NEXT: #APP
163 ; RV32IFD-NEXT: fcvt.w.d a0, ft3
164 ; RV32IFD-NEXT: #NO_APP
165 ; RV32IFD-NEXT: ret
167 ; RV64IFD-LABEL: explicit_register_ft3:
169 ; RV64IFD-NEXT: fmv.d ft3, fa0
170 ; RV64IFD-NEXT: #APP
171 ; RV64IFD-NEXT: fcvt.w.d a0, ft3
172 ; RV64IFD-NEXT: #NO_APP
173 ; RV64IFD-NEXT: ret
174 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft3}"(double %a)
175 ret i32 %1
179 ; RV32IFD-LABEL: explicit_register_f4:
181 ; RV32IFD-NEXT: fmv.d ft4, fa0
182 ; RV32IFD-NEXT: #APP
183 ; RV32IFD-NEXT: fcvt.w.d a0, ft4
184 ; RV32IFD-NEXT: #NO_APP
185 ; RV32IFD-NEXT: ret
187 ; RV64IFD-LABEL: explicit_register_f4:
189 ; RV64IFD-NEXT: fmv.d ft4, fa0
190 ; RV64IFD-NEXT: #APP
191 ; RV64IFD-NEXT: fcvt.w.d a0, ft4
192 ; RV64IFD-NEXT: #NO_APP
193 ; RV64IFD-NEXT: ret
194 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f4}"(double %a)
195 ret i32 %1
199 ; RV32IFD-LABEL: explicit_register_ft4:
201 ; RV32IFD-NEXT: fmv.d ft4, fa0
202 ; RV32IFD-NEXT: #APP
203 ; RV32IFD-NEXT: fcvt.w.d a0, ft4
204 ; RV32IFD-NEXT: #NO_APP
205 ; RV32IFD-NEXT: ret
207 ; RV64IFD-LABEL: explicit_register_ft4:
209 ; RV64IFD-NEXT: fmv.d ft4, fa0
210 ; RV64IFD-NEXT: #APP
211 ; RV64IFD-NEXT: fcvt.w.d a0, ft4
212 ; RV64IFD-NEXT: #NO_APP
213 ; RV64IFD-NEXT: ret
214 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft4}"(double %a)
215 ret i32 %1
219 ; RV32IFD-LABEL: explicit_register_f5:
221 ; RV32IFD-NEXT: fmv.d ft5, fa0
222 ; RV32IFD-NEXT: #APP
223 ; RV32IFD-NEXT: fcvt.w.d a0, ft5
224 ; RV32IFD-NEXT: #NO_APP
225 ; RV32IFD-NEXT: ret
227 ; RV64IFD-LABEL: explicit_register_f5:
229 ; RV64IFD-NEXT: fmv.d ft5, fa0
230 ; RV64IFD-NEXT: #APP
231 ; RV64IFD-NEXT: fcvt.w.d a0, ft5
232 ; RV64IFD-NEXT: #NO_APP
233 ; RV64IFD-NEXT: ret
234 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f5}"(double %a)
235 ret i32 %1
239 ; RV32IFD-LABEL: explicit_register_ft5:
241 ; RV32IFD-NEXT: fmv.d ft5, fa0
242 ; RV32IFD-NEXT: #APP
243 ; RV32IFD-NEXT: fcvt.w.d a0, ft5
244 ; RV32IFD-NEXT: #NO_APP
245 ; RV32IFD-NEXT: ret
247 ; RV64IFD-LABEL: explicit_register_ft5:
249 ; RV64IFD-NEXT: fmv.d ft5, fa0
250 ; RV64IFD-NEXT: #APP
251 ; RV64IFD-NEXT: fcvt.w.d a0, ft5
252 ; RV64IFD-NEXT: #NO_APP
253 ; RV64IFD-NEXT: ret
254 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft5}"(double %a)
255 ret i32 %1
259 ; RV32IFD-LABEL: explicit_register_f6:
261 ; RV32IFD-NEXT: fmv.d ft6, fa0
262 ; RV32IFD-NEXT: #APP
263 ; RV32IFD-NEXT: fcvt.w.d a0, ft6
264 ; RV32IFD-NEXT: #NO_APP
265 ; RV32IFD-NEXT: ret
267 ; RV64IFD-LABEL: explicit_register_f6:
269 ; RV64IFD-NEXT: fmv.d ft6, fa0
270 ; RV64IFD-NEXT: #APP
271 ; RV64IFD-NEXT: fcvt.w.d a0, ft6
272 ; RV64IFD-NEXT: #NO_APP
273 ; RV64IFD-NEXT: ret
274 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f6}"(double %a)
275 ret i32 %1
279 ; RV32IFD-LABEL: explicit_register_ft6:
281 ; RV32IFD-NEXT: fmv.d ft6, fa0
282 ; RV32IFD-NEXT: #APP
283 ; RV32IFD-NEXT: fcvt.w.d a0, ft6
284 ; RV32IFD-NEXT: #NO_APP
285 ; RV32IFD-NEXT: ret
287 ; RV64IFD-LABEL: explicit_register_ft6:
289 ; RV64IFD-NEXT: fmv.d ft6, fa0
290 ; RV64IFD-NEXT: #APP
291 ; RV64IFD-NEXT: fcvt.w.d a0, ft6
292 ; RV64IFD-NEXT: #NO_APP
293 ; RV64IFD-NEXT: ret
294 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft6}"(double %a)
295 ret i32 %1
299 ; RV32IFD-LABEL: explicit_register_f7:
301 ; RV32IFD-NEXT: fmv.d ft7, fa0
302 ; RV32IFD-NEXT: #APP
303 ; RV32IFD-NEXT: fcvt.w.d a0, ft7
304 ; RV32IFD-NEXT: #NO_APP
305 ; RV32IFD-NEXT: ret
307 ; RV64IFD-LABEL: explicit_register_f7:
309 ; RV64IFD-NEXT: fmv.d ft7, fa0
310 ; RV64IFD-NEXT: #APP
311 ; RV64IFD-NEXT: fcvt.w.d a0, ft7
312 ; RV64IFD-NEXT: #NO_APP
313 ; RV64IFD-NEXT: ret
314 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f7}"(double %a)
315 ret i32 %1
319 ; RV32IFD-LABEL: explicit_register_ft7:
321 ; RV32IFD-NEXT: fmv.d ft7, fa0
322 ; RV32IFD-NEXT: #APP
323 ; RV32IFD-NEXT: fcvt.w.d a0, ft7
324 ; RV32IFD-NEXT: #NO_APP
325 ; RV32IFD-NEXT: ret
327 ; RV64IFD-LABEL: explicit_register_ft7:
329 ; RV64IFD-NEXT: fmv.d ft7, fa0
330 ; RV64IFD-NEXT: #APP
331 ; RV64IFD-NEXT: fcvt.w.d a0, ft7
332 ; RV64IFD-NEXT: #NO_APP
333 ; RV64IFD-NEXT: ret
334 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft7}"(double %a)
335 ret i32 %1
341 ; RV32IFD-LABEL: explicit_register_f8:
343 ; RV32IFD-NEXT: addi sp, sp, -16
344 ; RV32IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
345 ; RV32IFD-NEXT: fmv.d fs0, fa0
346 ; RV32IFD-NEXT: #APP
347 ; RV32IFD-NEXT: fcvt.w.d a0, fs0
348 ; RV32IFD-NEXT: #NO_APP
349 ; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
350 ; RV32IFD-NEXT: addi sp, sp, 16
351 ; RV32IFD-NEXT: ret
353 ; RV64IFD-LABEL: explicit_register_f8:
355 ; RV64IFD-NEXT: addi sp, sp, -16
356 ; RV64IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
357 ; RV64IFD-NEXT: fmv.d fs0, fa0
358 ; RV64IFD-NEXT: #APP
359 ; RV64IFD-NEXT: fcvt.w.d a0, fs0
360 ; RV64IFD-NEXT: #NO_APP
361 ; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
362 ; RV64IFD-NEXT: addi sp, sp, 16
363 ; RV64IFD-NEXT: ret
364 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f8}"(double %a)
365 ret i32 %1
370 ; RV32IFD-LABEL: explicit_register_fs0:
372 ; RV32IFD-NEXT: addi sp, sp, -16
373 ; RV32IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
374 ; RV32IFD-NEXT: fmv.d fs0, fa0
375 ; RV32IFD-NEXT: #APP
376 ; RV32IFD-NEXT: fcvt.w.d a0, fs0
377 ; RV32IFD-NEXT: #NO_APP
378 ; RV32IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
379 ; RV32IFD-NEXT: addi sp, sp, 16
380 ; RV32IFD-NEXT: ret
382 ; RV64IFD-LABEL: explicit_register_fs0:
384 ; RV64IFD-NEXT: addi sp, sp, -16
385 ; RV64IFD-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
386 ; RV64IFD-NEXT: fmv.d fs0, fa0
387 ; RV64IFD-NEXT: #APP
388 ; RV64IFD-NEXT: fcvt.w.d a0, fs0
389 ; RV64IFD-NEXT: #NO_APP
390 ; RV64IFD-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
391 ; RV64IFD-NEXT: addi sp, sp, 16
392 ; RV64IFD-NEXT: ret
393 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs0}"(double %a)
394 ret i32 %1
399 ; RV32IFD-LABEL: explicit_register_f9:
401 ; RV32IFD-NEXT: addi sp, sp, -16
402 ; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
403 ; RV32IFD-NEXT: fmv.d fs1, fa0
404 ; RV32IFD-NEXT: #APP
405 ; RV32IFD-NEXT: fcvt.w.d a0, fs1
406 ; RV32IFD-NEXT: #NO_APP
407 ; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
408 ; RV32IFD-NEXT: addi sp, sp, 16
409 ; RV32IFD-NEXT: ret
411 ; RV64IFD-LABEL: explicit_register_f9:
413 ; RV64IFD-NEXT: addi sp, sp, -16
414 ; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
415 ; RV64IFD-NEXT: fmv.d fs1, fa0
416 ; RV64IFD-NEXT: #APP
417 ; RV64IFD-NEXT: fcvt.w.d a0, fs1
418 ; RV64IFD-NEXT: #NO_APP
419 ; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
420 ; RV64IFD-NEXT: addi sp, sp, 16
421 ; RV64IFD-NEXT: ret
422 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f9}"(double %a)
423 ret i32 %1
428 ; RV32IFD-LABEL: explicit_register_fs1:
430 ; RV32IFD-NEXT: addi sp, sp, -16
431 ; RV32IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
432 ; RV32IFD-NEXT: fmv.d fs1, fa0
433 ; RV32IFD-NEXT: #APP
434 ; RV32IFD-NEXT: fcvt.w.d a0, fs1
435 ; RV32IFD-NEXT: #NO_APP
436 ; RV32IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
437 ; RV32IFD-NEXT: addi sp, sp, 16
438 ; RV32IFD-NEXT: ret
440 ; RV64IFD-LABEL: explicit_register_fs1:
442 ; RV64IFD-NEXT: addi sp, sp, -16
443 ; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill
444 ; RV64IFD-NEXT: fmv.d fs1, fa0
445 ; RV64IFD-NEXT: #APP
446 ; RV64IFD-NEXT: fcvt.w.d a0, fs1
447 ; RV64IFD-NEXT: #NO_APP
448 ; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload
449 ; RV64IFD-NEXT: addi sp, sp, 16
450 ; RV64IFD-NEXT: ret
451 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs1}"(double %a)
452 ret i32 %1
456 ; RV32IFD-LABEL: explicit_register_f10:
458 ; RV32IFD-NEXT: #APP
459 ; RV32IFD-NEXT: fcvt.w.d a0, fa0
460 ; RV32IFD-NEXT: #NO_APP
461 ; RV32IFD-NEXT: ret
463 ; RV64IFD-LABEL: explicit_register_f10:
465 ; RV64IFD-NEXT: #APP
466 ; RV64IFD-NEXT: fcvt.w.d a0, fa0
467 ; RV64IFD-NEXT: #NO_APP
468 ; RV64IFD-NEXT: ret
469 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f10}"(double %a)
470 ret i32 %1
474 ; RV32IFD-LABEL: explicit_register_fa0:
476 ; RV32IFD-NEXT: #APP
477 ; RV32IFD-NEXT: fcvt.w.d a0, fa0
478 ; RV32IFD-NEXT: #NO_APP
479 ; RV32IFD-NEXT: ret
481 ; RV64IFD-LABEL: explicit_register_fa0:
483 ; RV64IFD-NEXT: #APP
484 ; RV64IFD-NEXT: fcvt.w.d a0, fa0
485 ; RV64IFD-NEXT: #NO_APP
486 ; RV64IFD-NEXT: ret
487 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa0}"(double %a)
488 ret i32 %1
492 ; RV32IFD-LABEL: explicit_register_f11:
494 ; RV32IFD-NEXT: fmv.d fa1, fa0
495 ; RV32IFD-NEXT: #APP
496 ; RV32IFD-NEXT: fcvt.w.d a0, fa1
497 ; RV32IFD-NEXT: #NO_APP
498 ; RV32IFD-NEXT: ret
500 ; RV64IFD-LABEL: explicit_register_f11:
502 ; RV64IFD-NEXT: fmv.d fa1, fa0
503 ; RV64IFD-NEXT: #APP
504 ; RV64IFD-NEXT: fcvt.w.d a0, fa1
505 ; RV64IFD-NEXT: #NO_APP
506 ; RV64IFD-NEXT: ret
507 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f11}"(double %a)
508 ret i32 %1
512 ; RV32IFD-LABEL: explicit_register_fa1:
514 ; RV32IFD-NEXT: fmv.d fa1, fa0
515 ; RV32IFD-NEXT: #APP
516 ; RV32IFD-NEXT: fcvt.w.d a0, fa1
517 ; RV32IFD-NEXT: #NO_APP
518 ; RV32IFD-NEXT: ret
520 ; RV64IFD-LABEL: explicit_register_fa1:
522 ; RV64IFD-NEXT: fmv.d fa1, fa0
523 ; RV64IFD-NEXT: #APP
524 ; RV64IFD-NEXT: fcvt.w.d a0, fa1
525 ; RV64IFD-NEXT: #NO_APP
526 ; RV64IFD-NEXT: ret
527 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa1}"(double %a)
528 ret i32 %1
532 ; RV32IFD-LABEL: explicit_register_f12:
534 ; RV32IFD-NEXT: fmv.d fa2, fa0
535 ; RV32IFD-NEXT: #APP
536 ; RV32IFD-NEXT: fcvt.w.d a0, fa2
537 ; RV32IFD-NEXT: #NO_APP
538 ; RV32IFD-NEXT: ret
540 ; RV64IFD-LABEL: explicit_register_f12:
542 ; RV64IFD-NEXT: fmv.d fa2, fa0
543 ; RV64IFD-NEXT: #APP
544 ; RV64IFD-NEXT: fcvt.w.d a0, fa2
545 ; RV64IFD-NEXT: #NO_APP
546 ; RV64IFD-NEXT: ret
547 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f12}"(double %a)
548 ret i32 %1
552 ; RV32IFD-LABEL: explicit_register_fa2:
554 ; RV32IFD-NEXT: fmv.d fa2, fa0
555 ; RV32IFD-NEXT: #APP
556 ; RV32IFD-NEXT: fcvt.w.d a0, fa2
557 ; RV32IFD-NEXT: #NO_APP
558 ; RV32IFD-NEXT: ret
560 ; RV64IFD-LABEL: explicit_register_fa2:
562 ; RV64IFD-NEXT: fmv.d fa2, fa0
563 ; RV64IFD-NEXT: #APP
564 ; RV64IFD-NEXT: fcvt.w.d a0, fa2
565 ; RV64IFD-NEXT: #NO_APP
566 ; RV64IFD-NEXT: ret
567 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa2}"(double %a)
568 ret i32 %1
572 ; RV32IFD-LABEL: explicit_register_f13:
574 ; RV32IFD-NEXT: fmv.d fa3, fa0
575 ; RV32IFD-NEXT: #APP
576 ; RV32IFD-NEXT: fcvt.w.d a0, fa3
577 ; RV32IFD-NEXT: #NO_APP
578 ; RV32IFD-NEXT: ret
580 ; RV64IFD-LABEL: explicit_register_f13:
582 ; RV64IFD-NEXT: fmv.d fa3, fa0
583 ; RV64IFD-NEXT: #APP
584 ; RV64IFD-NEXT: fcvt.w.d a0, fa3
585 ; RV64IFD-NEXT: #NO_APP
586 ; RV64IFD-NEXT: ret
587 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f13}"(double %a)
588 ret i32 %1
592 ; RV32IFD-LABEL: explicit_register_fa3:
594 ; RV32IFD-NEXT: fmv.d fa3, fa0
595 ; RV32IFD-NEXT: #APP
596 ; RV32IFD-NEXT: fcvt.w.d a0, fa3
597 ; RV32IFD-NEXT: #NO_APP
598 ; RV32IFD-NEXT: ret
600 ; RV64IFD-LABEL: explicit_register_fa3:
602 ; RV64IFD-NEXT: fmv.d fa3, fa0
603 ; RV64IFD-NEXT: #APP
604 ; RV64IFD-NEXT: fcvt.w.d a0, fa3
605 ; RV64IFD-NEXT: #NO_APP
606 ; RV64IFD-NEXT: ret
607 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa3}"(double %a)
608 ret i32 %1
612 ; RV32IFD-LABEL: explicit_register_f14:
614 ; RV32IFD-NEXT: fmv.d fa4, fa0
615 ; RV32IFD-NEXT: #APP
616 ; RV32IFD-NEXT: fcvt.w.d a0, fa4
617 ; RV32IFD-NEXT: #NO_APP
618 ; RV32IFD-NEXT: ret
620 ; RV64IFD-LABEL: explicit_register_f14:
622 ; RV64IFD-NEXT: fmv.d fa4, fa0
623 ; RV64IFD-NEXT: #APP
624 ; RV64IFD-NEXT: fcvt.w.d a0, fa4
625 ; RV64IFD-NEXT: #NO_APP
626 ; RV64IFD-NEXT: ret
627 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f14}"(double %a)
628 ret i32 %1
632 ; RV32IFD-LABEL: explicit_register_fa4:
634 ; RV32IFD-NEXT: fmv.d fa4, fa0
635 ; RV32IFD-NEXT: #APP
636 ; RV32IFD-NEXT: fcvt.w.d a0, fa4
637 ; RV32IFD-NEXT: #NO_APP
638 ; RV32IFD-NEXT: ret
640 ; RV64IFD-LABEL: explicit_register_fa4:
642 ; RV64IFD-NEXT: fmv.d fa4, fa0
643 ; RV64IFD-NEXT: #APP
644 ; RV64IFD-NEXT: fcvt.w.d a0, fa4
645 ; RV64IFD-NEXT: #NO_APP
646 ; RV64IFD-NEXT: ret
647 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa4}"(double %a)
648 ret i32 %1
652 ; RV32IFD-LABEL: explicit_register_f15:
654 ; RV32IFD-NEXT: fmv.d fa5, fa0
655 ; RV32IFD-NEXT: #APP
656 ; RV32IFD-NEXT: fcvt.w.d a0, fa5
657 ; RV32IFD-NEXT: #NO_APP
658 ; RV32IFD-NEXT: ret
660 ; RV64IFD-LABEL: explicit_register_f15:
662 ; RV64IFD-NEXT: fmv.d fa5, fa0
663 ; RV64IFD-NEXT: #APP
664 ; RV64IFD-NEXT: fcvt.w.d a0, fa5
665 ; RV64IFD-NEXT: #NO_APP
666 ; RV64IFD-NEXT: ret
667 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f15}"(double %a)
668 ret i32 %1
672 ; RV32IFD-LABEL: explicit_register_fa5:
674 ; RV32IFD-NEXT: fmv.d fa5, fa0
675 ; RV32IFD-NEXT: #APP
676 ; RV32IFD-NEXT: fcvt.w.d a0, fa5
677 ; RV32IFD-NEXT: #NO_APP
678 ; RV32IFD-NEXT: ret
680 ; RV64IFD-LABEL: explicit_register_fa5:
682 ; RV64IFD-NEXT: fmv.d fa5, fa0
683 ; RV64IFD-NEXT: #APP
684 ; RV64IFD-NEXT: fcvt.w.d a0, fa5
685 ; RV64IFD-NEXT: #NO_APP
686 ; RV64IFD-NEXT: ret
687 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa5}"(double %a)
688 ret i32 %1
692 ; RV32IFD-LABEL: explicit_register_f16:
694 ; RV32IFD-NEXT: fmv.d fa6, fa0
695 ; RV32IFD-NEXT: #APP
696 ; RV32IFD-NEXT: fcvt.w.d a0, fa6
697 ; RV32IFD-NEXT: #NO_APP
698 ; RV32IFD-NEXT: ret
700 ; RV64IFD-LABEL: explicit_register_f16:
702 ; RV64IFD-NEXT: fmv.d fa6, fa0
703 ; RV64IFD-NEXT: #APP
704 ; RV64IFD-NEXT: fcvt.w.d a0, fa6
705 ; RV64IFD-NEXT: #NO_APP
706 ; RV64IFD-NEXT: ret
707 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f16}"(double %a)
708 ret i32 %1
712 ; RV32IFD-LABEL: explicit_register_fa6:
714 ; RV32IFD-NEXT: fmv.d fa6, fa0
715 ; RV32IFD-NEXT: #APP
716 ; RV32IFD-NEXT: fcvt.w.d a0, fa6
717 ; RV32IFD-NEXT: #NO_APP
718 ; RV32IFD-NEXT: ret
720 ; RV64IFD-LABEL: explicit_register_fa6:
722 ; RV64IFD-NEXT: fmv.d fa6, fa0
723 ; RV64IFD-NEXT: #APP
724 ; RV64IFD-NEXT: fcvt.w.d a0, fa6
725 ; RV64IFD-NEXT: #NO_APP
726 ; RV64IFD-NEXT: ret
727 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa6}"(double %a)
728 ret i32 %1
732 ; RV32IFD-LABEL: explicit_register_f17:
734 ; RV32IFD-NEXT: fmv.d fa7, fa0
735 ; RV32IFD-NEXT: #APP
736 ; RV32IFD-NEXT: fcvt.w.d a0, fa7
737 ; RV32IFD-NEXT: #NO_APP
738 ; RV32IFD-NEXT: ret
740 ; RV64IFD-LABEL: explicit_register_f17:
742 ; RV64IFD-NEXT: fmv.d fa7, fa0
743 ; RV64IFD-NEXT: #APP
744 ; RV64IFD-NEXT: fcvt.w.d a0, fa7
745 ; RV64IFD-NEXT: #NO_APP
746 ; RV64IFD-NEXT: ret
747 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f17}"(double %a)
748 ret i32 %1
752 ; RV32IFD-LABEL: explicit_register_fa7:
754 ; RV32IFD-NEXT: fmv.d fa7, fa0
755 ; RV32IFD-NEXT: #APP
756 ; RV32IFD-NEXT: fcvt.w.d a0, fa7
757 ; RV32IFD-NEXT: #NO_APP
758 ; RV32IFD-NEXT: ret
760 ; RV64IFD-LABEL: explicit_register_fa7:
762 ; RV64IFD-NEXT: fmv.d fa7, fa0
763 ; RV64IFD-NEXT: #APP
764 ; RV64IFD-NEXT: fcvt.w.d a0, fa7
765 ; RV64IFD-NEXT: #NO_APP
766 ; RV64IFD-NEXT: ret
767 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fa7}"(double %a)
768 ret i32 %1
773 ; RV32IFD-LABEL: explicit_register_f18:
775 ; RV32IFD-NEXT: addi sp, sp, -16
776 ; RV32IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
777 ; RV32IFD-NEXT: fmv.d fs2, fa0
778 ; RV32IFD-NEXT: #APP
779 ; RV32IFD-NEXT: fcvt.w.d a0, fs2
780 ; RV32IFD-NEXT: #NO_APP
781 ; RV32IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
782 ; RV32IFD-NEXT: addi sp, sp, 16
783 ; RV32IFD-NEXT: ret
785 ; RV64IFD-LABEL: explicit_register_f18:
787 ; RV64IFD-NEXT: addi sp, sp, -16
788 ; RV64IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
789 ; RV64IFD-NEXT: fmv.d fs2, fa0
790 ; RV64IFD-NEXT: #APP
791 ; RV64IFD-NEXT: fcvt.w.d a0, fs2
792 ; RV64IFD-NEXT: #NO_APP
793 ; RV64IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
794 ; RV64IFD-NEXT: addi sp, sp, 16
795 ; RV64IFD-NEXT: ret
796 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f18}"(double %a)
797 ret i32 %1
802 ; RV32IFD-LABEL: explicit_register_fs2:
804 ; RV32IFD-NEXT: addi sp, sp, -16
805 ; RV32IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
806 ; RV32IFD-NEXT: fmv.d fs2, fa0
807 ; RV32IFD-NEXT: #APP
808 ; RV32IFD-NEXT: fcvt.w.d a0, fs2
809 ; RV32IFD-NEXT: #NO_APP
810 ; RV32IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
811 ; RV32IFD-NEXT: addi sp, sp, 16
812 ; RV32IFD-NEXT: ret
814 ; RV64IFD-LABEL: explicit_register_fs2:
816 ; RV64IFD-NEXT: addi sp, sp, -16
817 ; RV64IFD-NEXT: fsd fs2, 8(sp) # 8-byte Folded Spill
818 ; RV64IFD-NEXT: fmv.d fs2, fa0
819 ; RV64IFD-NEXT: #APP
820 ; RV64IFD-NEXT: fcvt.w.d a0, fs2
821 ; RV64IFD-NEXT: #NO_APP
822 ; RV64IFD-NEXT: fld fs2, 8(sp) # 8-byte Folded Reload
823 ; RV64IFD-NEXT: addi sp, sp, 16
824 ; RV64IFD-NEXT: ret
825 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs2}"(double %a)
826 ret i32 %1
831 ; RV32IFD-LABEL: explicit_register_f19:
833 ; RV32IFD-NEXT: addi sp, sp, -16
834 ; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
835 ; RV32IFD-NEXT: fmv.d fs3, fa0
836 ; RV32IFD-NEXT: #APP
837 ; RV32IFD-NEXT: fcvt.w.d a0, fs3
838 ; RV32IFD-NEXT: #NO_APP
839 ; RV32IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
840 ; RV32IFD-NEXT: addi sp, sp, 16
841 ; RV32IFD-NEXT: ret
843 ; RV64IFD-LABEL: explicit_register_f19:
845 ; RV64IFD-NEXT: addi sp, sp, -16
846 ; RV64IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
847 ; RV64IFD-NEXT: fmv.d fs3, fa0
848 ; RV64IFD-NEXT: #APP
849 ; RV64IFD-NEXT: fcvt.w.d a0, fs3
850 ; RV64IFD-NEXT: #NO_APP
851 ; RV64IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
852 ; RV64IFD-NEXT: addi sp, sp, 16
853 ; RV64IFD-NEXT: ret
854 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f19}"(double %a)
855 ret i32 %1
860 ; RV32IFD-LABEL: explicit_register_fs3:
862 ; RV32IFD-NEXT: addi sp, sp, -16
863 ; RV32IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
864 ; RV32IFD-NEXT: fmv.d fs3, fa0
865 ; RV32IFD-NEXT: #APP
866 ; RV32IFD-NEXT: fcvt.w.d a0, fs3
867 ; RV32IFD-NEXT: #NO_APP
868 ; RV32IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
869 ; RV32IFD-NEXT: addi sp, sp, 16
870 ; RV32IFD-NEXT: ret
872 ; RV64IFD-LABEL: explicit_register_fs3:
874 ; RV64IFD-NEXT: addi sp, sp, -16
875 ; RV64IFD-NEXT: fsd fs3, 8(sp) # 8-byte Folded Spill
876 ; RV64IFD-NEXT: fmv.d fs3, fa0
877 ; RV64IFD-NEXT: #APP
878 ; RV64IFD-NEXT: fcvt.w.d a0, fs3
879 ; RV64IFD-NEXT: #NO_APP
880 ; RV64IFD-NEXT: fld fs3, 8(sp) # 8-byte Folded Reload
881 ; RV64IFD-NEXT: addi sp, sp, 16
882 ; RV64IFD-NEXT: ret
883 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs3}"(double %a)
884 ret i32 %1
889 ; RV32IFD-LABEL: explicit_register_f20:
891 ; RV32IFD-NEXT: addi sp, sp, -16
892 ; RV32IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
893 ; RV32IFD-NEXT: fmv.d fs4, fa0
894 ; RV32IFD-NEXT: #APP
895 ; RV32IFD-NEXT: fcvt.w.d a0, fs4
896 ; RV32IFD-NEXT: #NO_APP
897 ; RV32IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
898 ; RV32IFD-NEXT: addi sp, sp, 16
899 ; RV32IFD-NEXT: ret
901 ; RV64IFD-LABEL: explicit_register_f20:
903 ; RV64IFD-NEXT: addi sp, sp, -16
904 ; RV64IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
905 ; RV64IFD-NEXT: fmv.d fs4, fa0
906 ; RV64IFD-NEXT: #APP
907 ; RV64IFD-NEXT: fcvt.w.d a0, fs4
908 ; RV64IFD-NEXT: #NO_APP
909 ; RV64IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
910 ; RV64IFD-NEXT: addi sp, sp, 16
911 ; RV64IFD-NEXT: ret
912 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f20}"(double %a)
913 ret i32 %1
918 ; RV32IFD-LABEL: explicit_register_fs4:
920 ; RV32IFD-NEXT: addi sp, sp, -16
921 ; RV32IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
922 ; RV32IFD-NEXT: fmv.d fs4, fa0
923 ; RV32IFD-NEXT: #APP
924 ; RV32IFD-NEXT: fcvt.w.d a0, fs4
925 ; RV32IFD-NEXT: #NO_APP
926 ; RV32IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
927 ; RV32IFD-NEXT: addi sp, sp, 16
928 ; RV32IFD-NEXT: ret
930 ; RV64IFD-LABEL: explicit_register_fs4:
932 ; RV64IFD-NEXT: addi sp, sp, -16
933 ; RV64IFD-NEXT: fsd fs4, 8(sp) # 8-byte Folded Spill
934 ; RV64IFD-NEXT: fmv.d fs4, fa0
935 ; RV64IFD-NEXT: #APP
936 ; RV64IFD-NEXT: fcvt.w.d a0, fs4
937 ; RV64IFD-NEXT: #NO_APP
938 ; RV64IFD-NEXT: fld fs4, 8(sp) # 8-byte Folded Reload
939 ; RV64IFD-NEXT: addi sp, sp, 16
940 ; RV64IFD-NEXT: ret
941 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs4}"(double %a)
942 ret i32 %1
947 ; RV32IFD-LABEL: explicit_register_f21:
949 ; RV32IFD-NEXT: addi sp, sp, -16
950 ; RV32IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
951 ; RV32IFD-NEXT: fmv.d fs5, fa0
952 ; RV32IFD-NEXT: #APP
953 ; RV32IFD-NEXT: fcvt.w.d a0, fs5
954 ; RV32IFD-NEXT: #NO_APP
955 ; RV32IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
956 ; RV32IFD-NEXT: addi sp, sp, 16
957 ; RV32IFD-NEXT: ret
959 ; RV64IFD-LABEL: explicit_register_f21:
961 ; RV64IFD-NEXT: addi sp, sp, -16
962 ; RV64IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
963 ; RV64IFD-NEXT: fmv.d fs5, fa0
964 ; RV64IFD-NEXT: #APP
965 ; RV64IFD-NEXT: fcvt.w.d a0, fs5
966 ; RV64IFD-NEXT: #NO_APP
967 ; RV64IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
968 ; RV64IFD-NEXT: addi sp, sp, 16
969 ; RV64IFD-NEXT: ret
970 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f21}"(double %a)
971 ret i32 %1
976 ; RV32IFD-LABEL: explicit_register_fs5:
978 ; RV32IFD-NEXT: addi sp, sp, -16
979 ; RV32IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
980 ; RV32IFD-NEXT: fmv.d fs5, fa0
981 ; RV32IFD-NEXT: #APP
982 ; RV32IFD-NEXT: fcvt.w.d a0, fs5
983 ; RV32IFD-NEXT: #NO_APP
984 ; RV32IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
985 ; RV32IFD-NEXT: addi sp, sp, 16
986 ; RV32IFD-NEXT: ret
988 ; RV64IFD-LABEL: explicit_register_fs5:
990 ; RV64IFD-NEXT: addi sp, sp, -16
991 ; RV64IFD-NEXT: fsd fs5, 8(sp) # 8-byte Folded Spill
992 ; RV64IFD-NEXT: fmv.d fs5, fa0
993 ; RV64IFD-NEXT: #APP
994 ; RV64IFD-NEXT: fcvt.w.d a0, fs5
995 ; RV64IFD-NEXT: #NO_APP
996 ; RV64IFD-NEXT: fld fs5, 8(sp) # 8-byte Folded Reload
997 ; RV64IFD-NEXT: addi sp, sp, 16
998 ; RV64IFD-NEXT: ret
999 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs5}"(double %a)
1000 ret i32 %1
1005 ; RV32IFD-LABEL: explicit_register_f22:
1007 ; RV32IFD-NEXT: addi sp, sp, -16
1008 ; RV32IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
1009 ; RV32IFD-NEXT: fmv.d fs6, fa0
1010 ; RV32IFD-NEXT: #APP
1011 ; RV32IFD-NEXT: fcvt.w.d a0, fs6
1012 ; RV32IFD-NEXT: #NO_APP
1013 ; RV32IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
1014 ; RV32IFD-NEXT: addi sp, sp, 16
1015 ; RV32IFD-NEXT: ret
1017 ; RV64IFD-LABEL: explicit_register_f22:
1019 ; RV64IFD-NEXT: addi sp, sp, -16
1020 ; RV64IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
1021 ; RV64IFD-NEXT: fmv.d fs6, fa0
1022 ; RV64IFD-NEXT: #APP
1023 ; RV64IFD-NEXT: fcvt.w.d a0, fs6
1024 ; RV64IFD-NEXT: #NO_APP
1025 ; RV64IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
1026 ; RV64IFD-NEXT: addi sp, sp, 16
1027 ; RV64IFD-NEXT: ret
1028 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f22}"(double %a)
1029 ret i32 %1
1034 ; RV32IFD-LABEL: explicit_register_fs6:
1036 ; RV32IFD-NEXT: addi sp, sp, -16
1037 ; RV32IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
1038 ; RV32IFD-NEXT: fmv.d fs6, fa0
1039 ; RV32IFD-NEXT: #APP
1040 ; RV32IFD-NEXT: fcvt.w.d a0, fs6
1041 ; RV32IFD-NEXT: #NO_APP
1042 ; RV32IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
1043 ; RV32IFD-NEXT: addi sp, sp, 16
1044 ; RV32IFD-NEXT: ret
1046 ; RV64IFD-LABEL: explicit_register_fs6:
1048 ; RV64IFD-NEXT: addi sp, sp, -16
1049 ; RV64IFD-NEXT: fsd fs6, 8(sp) # 8-byte Folded Spill
1050 ; RV64IFD-NEXT: fmv.d fs6, fa0
1051 ; RV64IFD-NEXT: #APP
1052 ; RV64IFD-NEXT: fcvt.w.d a0, fs6
1053 ; RV64IFD-NEXT: #NO_APP
1054 ; RV64IFD-NEXT: fld fs6, 8(sp) # 8-byte Folded Reload
1055 ; RV64IFD-NEXT: addi sp, sp, 16
1056 ; RV64IFD-NEXT: ret
1057 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs6}"(double %a)
1058 ret i32 %1
1063 ; RV32IFD-LABEL: explicit_register_f23:
1065 ; RV32IFD-NEXT: addi sp, sp, -16
1066 ; RV32IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
1067 ; RV32IFD-NEXT: fmv.d fs7, fa0
1068 ; RV32IFD-NEXT: #APP
1069 ; RV32IFD-NEXT: fcvt.w.d a0, fs7
1070 ; RV32IFD-NEXT: #NO_APP
1071 ; RV32IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
1072 ; RV32IFD-NEXT: addi sp, sp, 16
1073 ; RV32IFD-NEXT: ret
1075 ; RV64IFD-LABEL: explicit_register_f23:
1077 ; RV64IFD-NEXT: addi sp, sp, -16
1078 ; RV64IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
1079 ; RV64IFD-NEXT: fmv.d fs7, fa0
1080 ; RV64IFD-NEXT: #APP
1081 ; RV64IFD-NEXT: fcvt.w.d a0, fs7
1082 ; RV64IFD-NEXT: #NO_APP
1083 ; RV64IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
1084 ; RV64IFD-NEXT: addi sp, sp, 16
1085 ; RV64IFD-NEXT: ret
1086 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f23}"(double %a)
1087 ret i32 %1
1092 ; RV32IFD-LABEL: explicit_register_fs7:
1094 ; RV32IFD-NEXT: addi sp, sp, -16
1095 ; RV32IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
1096 ; RV32IFD-NEXT: fmv.d fs7, fa0
1097 ; RV32IFD-NEXT: #APP
1098 ; RV32IFD-NEXT: fcvt.w.d a0, fs7
1099 ; RV32IFD-NEXT: #NO_APP
1100 ; RV32IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
1101 ; RV32IFD-NEXT: addi sp, sp, 16
1102 ; RV32IFD-NEXT: ret
1104 ; RV64IFD-LABEL: explicit_register_fs7:
1106 ; RV64IFD-NEXT: addi sp, sp, -16
1107 ; RV64IFD-NEXT: fsd fs7, 8(sp) # 8-byte Folded Spill
1108 ; RV64IFD-NEXT: fmv.d fs7, fa0
1109 ; RV64IFD-NEXT: #APP
1110 ; RV64IFD-NEXT: fcvt.w.d a0, fs7
1111 ; RV64IFD-NEXT: #NO_APP
1112 ; RV64IFD-NEXT: fld fs7, 8(sp) # 8-byte Folded Reload
1113 ; RV64IFD-NEXT: addi sp, sp, 16
1114 ; RV64IFD-NEXT: ret
1115 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs7}"(double %a)
1116 ret i32 %1
1121 ; RV32IFD-LABEL: explicit_register_f24:
1123 ; RV32IFD-NEXT: addi sp, sp, -16
1124 ; RV32IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
1125 ; RV32IFD-NEXT: fmv.d fs8, fa0
1126 ; RV32IFD-NEXT: #APP
1127 ; RV32IFD-NEXT: fcvt.w.d a0, fs8
1128 ; RV32IFD-NEXT: #NO_APP
1129 ; RV32IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
1130 ; RV32IFD-NEXT: addi sp, sp, 16
1131 ; RV32IFD-NEXT: ret
1133 ; RV64IFD-LABEL: explicit_register_f24:
1135 ; RV64IFD-NEXT: addi sp, sp, -16
1136 ; RV64IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
1137 ; RV64IFD-NEXT: fmv.d fs8, fa0
1138 ; RV64IFD-NEXT: #APP
1139 ; RV64IFD-NEXT: fcvt.w.d a0, fs8
1140 ; RV64IFD-NEXT: #NO_APP
1141 ; RV64IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
1142 ; RV64IFD-NEXT: addi sp, sp, 16
1143 ; RV64IFD-NEXT: ret
1144 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f24}"(double %a)
1145 ret i32 %1
1150 ; RV32IFD-LABEL: explicit_register_fs8:
1152 ; RV32IFD-NEXT: addi sp, sp, -16
1153 ; RV32IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
1154 ; RV32IFD-NEXT: fmv.d fs8, fa0
1155 ; RV32IFD-NEXT: #APP
1156 ; RV32IFD-NEXT: fcvt.w.d a0, fs8
1157 ; RV32IFD-NEXT: #NO_APP
1158 ; RV32IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
1159 ; RV32IFD-NEXT: addi sp, sp, 16
1160 ; RV32IFD-NEXT: ret
1162 ; RV64IFD-LABEL: explicit_register_fs8:
1164 ; RV64IFD-NEXT: addi sp, sp, -16
1165 ; RV64IFD-NEXT: fsd fs8, 8(sp) # 8-byte Folded Spill
1166 ; RV64IFD-NEXT: fmv.d fs8, fa0
1167 ; RV64IFD-NEXT: #APP
1168 ; RV64IFD-NEXT: fcvt.w.d a0, fs8
1169 ; RV64IFD-NEXT: #NO_APP
1170 ; RV64IFD-NEXT: fld fs8, 8(sp) # 8-byte Folded Reload
1171 ; RV64IFD-NEXT: addi sp, sp, 16
1172 ; RV64IFD-NEXT: ret
1173 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs8}"(double %a)
1174 ret i32 %1
1179 ; RV32IFD-LABEL: explicit_register_f25:
1181 ; RV32IFD-NEXT: addi sp, sp, -16
1182 ; RV32IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
1183 ; RV32IFD-NEXT: fmv.d fs9, fa0
1184 ; RV32IFD-NEXT: #APP
1185 ; RV32IFD-NEXT: fcvt.w.d a0, fs9
1186 ; RV32IFD-NEXT: #NO_APP
1187 ; RV32IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
1188 ; RV32IFD-NEXT: addi sp, sp, 16
1189 ; RV32IFD-NEXT: ret
1191 ; RV64IFD-LABEL: explicit_register_f25:
1193 ; RV64IFD-NEXT: addi sp, sp, -16
1194 ; RV64IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
1195 ; RV64IFD-NEXT: fmv.d fs9, fa0
1196 ; RV64IFD-NEXT: #APP
1197 ; RV64IFD-NEXT: fcvt.w.d a0, fs9
1198 ; RV64IFD-NEXT: #NO_APP
1199 ; RV64IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
1200 ; RV64IFD-NEXT: addi sp, sp, 16
1201 ; RV64IFD-NEXT: ret
1202 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f25}"(double %a)
1203 ret i32 %1
1208 ; RV32IFD-LABEL: explicit_register_fs9:
1210 ; RV32IFD-NEXT: addi sp, sp, -16
1211 ; RV32IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
1212 ; RV32IFD-NEXT: fmv.d fs9, fa0
1213 ; RV32IFD-NEXT: #APP
1214 ; RV32IFD-NEXT: fcvt.w.d a0, fs9
1215 ; RV32IFD-NEXT: #NO_APP
1216 ; RV32IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
1217 ; RV32IFD-NEXT: addi sp, sp, 16
1218 ; RV32IFD-NEXT: ret
1220 ; RV64IFD-LABEL: explicit_register_fs9:
1222 ; RV64IFD-NEXT: addi sp, sp, -16
1223 ; RV64IFD-NEXT: fsd fs9, 8(sp) # 8-byte Folded Spill
1224 ; RV64IFD-NEXT: fmv.d fs9, fa0
1225 ; RV64IFD-NEXT: #APP
1226 ; RV64IFD-NEXT: fcvt.w.d a0, fs9
1227 ; RV64IFD-NEXT: #NO_APP
1228 ; RV64IFD-NEXT: fld fs9, 8(sp) # 8-byte Folded Reload
1229 ; RV64IFD-NEXT: addi sp, sp, 16
1230 ; RV64IFD-NEXT: ret
1231 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs9}"(double %a)
1232 ret i32 %1
1237 ; RV32IFD-LABEL: explicit_register_f26:
1239 ; RV32IFD-NEXT: addi sp, sp, -16
1240 ; RV32IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
1241 ; RV32IFD-NEXT: fmv.d fs10, fa0
1242 ; RV32IFD-NEXT: #APP
1243 ; RV32IFD-NEXT: fcvt.w.d a0, fs10
1244 ; RV32IFD-NEXT: #NO_APP
1245 ; RV32IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
1246 ; RV32IFD-NEXT: addi sp, sp, 16
1247 ; RV32IFD-NEXT: ret
1249 ; RV64IFD-LABEL: explicit_register_f26:
1251 ; RV64IFD-NEXT: addi sp, sp, -16
1252 ; RV64IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
1253 ; RV64IFD-NEXT: fmv.d fs10, fa0
1254 ; RV64IFD-NEXT: #APP
1255 ; RV64IFD-NEXT: fcvt.w.d a0, fs10
1256 ; RV64IFD-NEXT: #NO_APP
1257 ; RV64IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
1258 ; RV64IFD-NEXT: addi sp, sp, 16
1259 ; RV64IFD-NEXT: ret
1260 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f26}"(double %a)
1261 ret i32 %1
1266 ; RV32IFD-LABEL: explicit_register_fs10:
1268 ; RV32IFD-NEXT: addi sp, sp, -16
1269 ; RV32IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
1270 ; RV32IFD-NEXT: fmv.d fs10, fa0
1271 ; RV32IFD-NEXT: #APP
1272 ; RV32IFD-NEXT: fcvt.w.d a0, fs10
1273 ; RV32IFD-NEXT: #NO_APP
1274 ; RV32IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
1275 ; RV32IFD-NEXT: addi sp, sp, 16
1276 ; RV32IFD-NEXT: ret
1278 ; RV64IFD-LABEL: explicit_register_fs10:
1280 ; RV64IFD-NEXT: addi sp, sp, -16
1281 ; RV64IFD-NEXT: fsd fs10, 8(sp) # 8-byte Folded Spill
1282 ; RV64IFD-NEXT: fmv.d fs10, fa0
1283 ; RV64IFD-NEXT: #APP
1284 ; RV64IFD-NEXT: fcvt.w.d a0, fs10
1285 ; RV64IFD-NEXT: #NO_APP
1286 ; RV64IFD-NEXT: fld fs10, 8(sp) # 8-byte Folded Reload
1287 ; RV64IFD-NEXT: addi sp, sp, 16
1288 ; RV64IFD-NEXT: ret
1289 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs10}"(double %a)
1290 ret i32 %1
1295 ; RV32IFD-LABEL: explicit_register_f27:
1297 ; RV32IFD-NEXT: addi sp, sp, -16
1298 ; RV32IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
1299 ; RV32IFD-NEXT: fmv.d fs11, fa0
1300 ; RV32IFD-NEXT: #APP
1301 ; RV32IFD-NEXT: fcvt.w.d a0, fs11
1302 ; RV32IFD-NEXT: #NO_APP
1303 ; RV32IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
1304 ; RV32IFD-NEXT: addi sp, sp, 16
1305 ; RV32IFD-NEXT: ret
1307 ; RV64IFD-LABEL: explicit_register_f27:
1309 ; RV64IFD-NEXT: addi sp, sp, -16
1310 ; RV64IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
1311 ; RV64IFD-NEXT: fmv.d fs11, fa0
1312 ; RV64IFD-NEXT: #APP
1313 ; RV64IFD-NEXT: fcvt.w.d a0, fs11
1314 ; RV64IFD-NEXT: #NO_APP
1315 ; RV64IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
1316 ; RV64IFD-NEXT: addi sp, sp, 16
1317 ; RV64IFD-NEXT: ret
1318 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f27}"(double %a)
1319 ret i32 %1
1324 ; RV32IFD-LABEL: explicit_register_fs11:
1326 ; RV32IFD-NEXT: addi sp, sp, -16
1327 ; RV32IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
1328 ; RV32IFD-NEXT: fmv.d fs11, fa0
1329 ; RV32IFD-NEXT: #APP
1330 ; RV32IFD-NEXT: fcvt.w.d a0, fs11
1331 ; RV32IFD-NEXT: #NO_APP
1332 ; RV32IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
1333 ; RV32IFD-NEXT: addi sp, sp, 16
1334 ; RV32IFD-NEXT: ret
1336 ; RV64IFD-LABEL: explicit_register_fs11:
1338 ; RV64IFD-NEXT: addi sp, sp, -16
1339 ; RV64IFD-NEXT: fsd fs11, 8(sp) # 8-byte Folded Spill
1340 ; RV64IFD-NEXT: fmv.d fs11, fa0
1341 ; RV64IFD-NEXT: #APP
1342 ; RV64IFD-NEXT: fcvt.w.d a0, fs11
1343 ; RV64IFD-NEXT: #NO_APP
1344 ; RV64IFD-NEXT: fld fs11, 8(sp) # 8-byte Folded Reload
1345 ; RV64IFD-NEXT: addi sp, sp, 16
1346 ; RV64IFD-NEXT: ret
1347 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{fs11}"(double %a)
1348 ret i32 %1
1352 ; RV32IFD-LABEL: explicit_register_f28:
1354 ; RV32IFD-NEXT: fmv.d ft8, fa0
1355 ; RV32IFD-NEXT: #APP
1356 ; RV32IFD-NEXT: fcvt.w.d a0, ft8
1357 ; RV32IFD-NEXT: #NO_APP
1358 ; RV32IFD-NEXT: ret
1360 ; RV64IFD-LABEL: explicit_register_f28:
1362 ; RV64IFD-NEXT: fmv.d ft8, fa0
1363 ; RV64IFD-NEXT: #APP
1364 ; RV64IFD-NEXT: fcvt.w.d a0, ft8
1365 ; RV64IFD-NEXT: #NO_APP
1366 ; RV64IFD-NEXT: ret
1367 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f28}"(double %a)
1368 ret i32 %1
1372 ; RV32IFD-LABEL: explicit_register_ft8:
1374 ; RV32IFD-NEXT: fmv.d ft8, fa0
1375 ; RV32IFD-NEXT: #APP
1376 ; RV32IFD-NEXT: fcvt.w.d a0, ft8
1377 ; RV32IFD-NEXT: #NO_APP
1378 ; RV32IFD-NEXT: ret
1380 ; RV64IFD-LABEL: explicit_register_ft8:
1382 ; RV64IFD-NEXT: fmv.d ft8, fa0
1383 ; RV64IFD-NEXT: #APP
1384 ; RV64IFD-NEXT: fcvt.w.d a0, ft8
1385 ; RV64IFD-NEXT: #NO_APP
1386 ; RV64IFD-NEXT: ret
1387 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft8}"(double %a)
1388 ret i32 %1
1392 ; RV32IFD-LABEL: explicit_register_f29:
1394 ; RV32IFD-NEXT: fmv.d ft9, fa0
1395 ; RV32IFD-NEXT: #APP
1396 ; RV32IFD-NEXT: fcvt.w.d a0, ft9
1397 ; RV32IFD-NEXT: #NO_APP
1398 ; RV32IFD-NEXT: ret
1400 ; RV64IFD-LABEL: explicit_register_f29:
1402 ; RV64IFD-NEXT: fmv.d ft9, fa0
1403 ; RV64IFD-NEXT: #APP
1404 ; RV64IFD-NEXT: fcvt.w.d a0, ft9
1405 ; RV64IFD-NEXT: #NO_APP
1406 ; RV64IFD-NEXT: ret
1407 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f29}"(double %a)
1408 ret i32 %1
1412 ; RV32IFD-LABEL: explicit_register_ft9:
1414 ; RV32IFD-NEXT: fmv.d ft9, fa0
1415 ; RV32IFD-NEXT: #APP
1416 ; RV32IFD-NEXT: fcvt.w.d a0, ft9
1417 ; RV32IFD-NEXT: #NO_APP
1418 ; RV32IFD-NEXT: ret
1420 ; RV64IFD-LABEL: explicit_register_ft9:
1422 ; RV64IFD-NEXT: fmv.d ft9, fa0
1423 ; RV64IFD-NEXT: #APP
1424 ; RV64IFD-NEXT: fcvt.w.d a0, ft9
1425 ; RV64IFD-NEXT: #NO_APP
1426 ; RV64IFD-NEXT: ret
1427 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft9}"(double %a)
1428 ret i32 %1
1432 ; RV32IFD-LABEL: explicit_register_f30:
1434 ; RV32IFD-NEXT: fmv.d ft10, fa0
1435 ; RV32IFD-NEXT: #APP
1436 ; RV32IFD-NEXT: fcvt.w.d a0, ft10
1437 ; RV32IFD-NEXT: #NO_APP
1438 ; RV32IFD-NEXT: ret
1440 ; RV64IFD-LABEL: explicit_register_f30:
1442 ; RV64IFD-NEXT: fmv.d ft10, fa0
1443 ; RV64IFD-NEXT: #APP
1444 ; RV64IFD-NEXT: fcvt.w.d a0, ft10
1445 ; RV64IFD-NEXT: #NO_APP
1446 ; RV64IFD-NEXT: ret
1447 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f30}"(double %a)
1448 ret i32 %1
1452 ; RV32IFD-LABEL: explicit_register_ft10:
1454 ; RV32IFD-NEXT: fmv.d ft10, fa0
1455 ; RV32IFD-NEXT: #APP
1456 ; RV32IFD-NEXT: fcvt.w.d a0, ft10
1457 ; RV32IFD-NEXT: #NO_APP
1458 ; RV32IFD-NEXT: ret
1460 ; RV64IFD-LABEL: explicit_register_ft10:
1462 ; RV64IFD-NEXT: fmv.d ft10, fa0
1463 ; RV64IFD-NEXT: #APP
1464 ; RV64IFD-NEXT: fcvt.w.d a0, ft10
1465 ; RV64IFD-NEXT: #NO_APP
1466 ; RV64IFD-NEXT: ret
1467 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft10}"(double %a)
1468 ret i32 %1
1472 ; RV32IFD-LABEL: explicit_register_f31:
1474 ; RV32IFD-NEXT: fmv.d ft11, fa0
1475 ; RV32IFD-NEXT: #APP
1476 ; RV32IFD-NEXT: fcvt.w.d a0, ft11
1477 ; RV32IFD-NEXT: #NO_APP
1478 ; RV32IFD-NEXT: ret
1480 ; RV64IFD-LABEL: explicit_register_f31:
1482 ; RV64IFD-NEXT: fmv.d ft11, fa0
1483 ; RV64IFD-NEXT: #APP
1484 ; RV64IFD-NEXT: fcvt.w.d a0, ft11
1485 ; RV64IFD-NEXT: #NO_APP
1486 ; RV64IFD-NEXT: ret
1487 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{f31}"(double %a)
1488 ret i32 %1
1492 ; RV32IFD-LABEL: explicit_register_ft11:
1494 ; RV32IFD-NEXT: fmv.d ft11, fa0
1495 ; RV32IFD-NEXT: #APP
1496 ; RV32IFD-NEXT: fcvt.w.d a0, ft11
1497 ; RV32IFD-NEXT: #NO_APP
1498 ; RV32IFD-NEXT: ret
1500 ; RV64IFD-LABEL: explicit_register_ft11:
1502 ; RV64IFD-NEXT: fmv.d ft11, fa0
1503 ; RV64IFD-NEXT: #APP
1504 ; RV64IFD-NEXT: fcvt.w.d a0, ft11
1505 ; RV64IFD-NEXT: #NO_APP
1506 ; RV64IFD-NEXT: ret
1507 %1 = tail call i32 asm "fcvt.w.d $0, $1", "=r,{ft11}"(double %a)
1508 ret i32 %1