Lines Matching full:8
3 %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> }
4 %struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
5 %struct.__neon_int8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
7 define <8 x i8> @vtbl1(ptr %A, ptr %B) nounwind {
9 ;CHECK: vtbl.8
10 %tmp1 = load <8 x i8>, ptr %A
11 %tmp2 = load <8 x i8>, ptr %B
12 %tmp3 = call <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8> %tmp1, <8 x i8> %tmp2)
13 ret <8 x i8> %tmp3
16 define <8 x i8> @vtbl2(ptr %A, ptr %B) nounwind {
18 ;CHECK: vtbl.8
19 %tmp1 = load <8 x i8>, ptr %A
23 %tmp5 = call <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4)
24 ret <8 x i8> %tmp5
27 define <8 x i8> @vtbl3(ptr %A, ptr %B) nounwind {
29 ;CHECK: vtbl.8
30 %tmp1 = load <8 x i8>, ptr %A
35 …%tmp6 = call <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8…
36 ret <8 x i8> %tmp6
39 define <8 x i8> @vtbl4(ptr %A, ptr %B) nounwind {
41 ;CHECK: vtbl.8
42 %tmp1 = load <8 x i8>, ptr %A
48 …%tmp7 = call <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8…
49 ret <8 x i8> %tmp7
52 define <8 x i8> @vtbx1(ptr %A, ptr %B, ptr %C) nounwind {
54 ;CHECK: vtbx.8
55 %tmp1 = load <8 x i8>, ptr %A
56 %tmp2 = load <8 x i8>, ptr %B
57 %tmp3 = load <8 x i8>, ptr %C
58 %tmp4 = call <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8> %tmp1, <8 x i8> %tmp2, <8 x i8> %tmp3)
59 ret <8 x i8> %tmp4
62 define <8 x i8> @vtbx2(ptr %A, ptr %B, ptr %C) nounwind {
64 ;CHECK: vtbx.8
65 %tmp1 = load <8 x i8>, ptr %A
69 %tmp5 = load <8 x i8>, ptr %C
70 …%tmp6 = call <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8…
71 ret <8 x i8> %tmp6
74 define <8 x i8> @vtbx3(ptr %A, ptr %B, ptr %C) nounwind {
76 ;CHECK: vtbx.8
77 %tmp1 = load <8 x i8>, ptr %A
82 %tmp6 = load <8 x i8>, ptr %C
83 …%tmp7 = call <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8…
84 ret <8 x i8> %tmp7
87 define <8 x i8> @vtbx4(ptr %A, ptr %B, ptr %C) nounwind {
89 ;CHECK: vtbx.8
90 %tmp1 = load <8 x i8>, ptr %A
96 %tmp7 = load <8 x i8>, ptr %C
97 …%tmp8 = call <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8> %tmp1, <8 x i8> %tmp3, <8 x i8> %tmp4, <8 x i8…
98 ret <8 x i8> %tmp8
101 declare <8 x i8> @llvm.arm.neon.vtbl1(<8 x i8>, <8 x i8>) nounwind readnone
102 declare <8 x i8> @llvm.arm.neon.vtbl2(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
103 declare <8 x i8> @llvm.arm.neon.vtbl3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
104 declare <8 x i8> @llvm.arm.neon.vtbl4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind r…
106 declare <8 x i8> @llvm.arm.neon.vtbx1(<8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
107 declare <8 x i8> @llvm.arm.neon.vtbx2(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind readnone
108 declare <8 x i8> @llvm.arm.neon.vtbx3(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) nounwind r…
109 declare <8 x i8> @llvm.arm.neon.vtbx4(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8>) …