Lines Matching +full:0 +full:x1fc0
12 ; GCN-DAG: v_lshlrev_b32_e32 [[SCALED_IDX:v[0-9]+]], 4, v0
13 ; GCN-DAG: v_lshrrev_b32_e64 [[FRAMEDIFF:v[0-9]+]], 6, s32
14 ; GCN: v_add_u32_e32 [[FI:v[0-9]+]], vcc, [[SCALED_IDX]], [[FRAMEDIFF]]
18 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
19 ; GCN: v_or_b32_e32 v{{[0-9]+}}, 12
20 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
21 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
22 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
27 define void @needs_align16_default_stack_align(i32 %idx) #0 {
29 %gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
35 ; GCN: s_add_i32 [[SCRATCH_REG:s[0-9]+]], s32, 0x3c0{{$}}
36 ; GCN: s_and_b32 s33, [[SCRATCH_REG]], 0xfffffc00
38 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
39 ; GCN: v_or_b32_e32 v{{[0-9]+}}, 12
40 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
41 ; GCN: s_addk_i32 s32, 0x2800{{$}}
42 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
43 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
50 %gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
56 ; GCN: s_add_i32 [[SCRATCH_REG:s[0-9]+]], s32, 0x7c0{{$}}
57 ; GCN: s_and_b32 s33, [[SCRATCH_REG]], 0xfffff800
59 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
60 ; GCN: v_or_b32_e32 v{{[0-9]+}}, 12
61 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
62 ; GCN: s_addk_i32 s32, 0x3000{{$}}
63 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
64 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
69 define void @needs_align32(i32 %idx) #0 {
71 %gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
77 ; GCN: s_add_i32 [[SCRATCH_REG:s[0-9]+]], s32, 0xc0{{$}}
78 ; GCN: s_and_b32 s33, [[SCRATCH_REG]], 0xffffff00
79 ; GCN: s_addk_i32 s32, 0xd00{{$}}
81 ; GCN: buffer_store_dword v{{[0-9]+}}, v{{[0-9]+}}, s[0:3], 0 offen
87 %gep0 = getelementptr inbounds [8 x i32], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
93 ; GCN: s_movk_i32 s32, 0x400{{$}}
96 define amdgpu_kernel void @kernel_call_align16_from_8() #0 {
105 ; GCN: s_movk_i32 s32, 0x400
116 ; GCN: s_movk_i32 s32, 0x400
127 ; GCN: s_mov_b32 [[FP_COPY:s[0-9]+]], s33
128 ; GCN-NEXT: s_add_i32 s33, s32, 0x1fc0
129 ; GCN-NEXT: s_and_b32 s33, s33, 0xffffe000
132 ; GCN-NEXT: s_addk_i32 s32, 0x4000
134 ; GCN: buffer_store_dword v0, off, s[0:3], s33{{$}}
137 define void @default_realign_align128(i32 %idx) #0 {
145 ; GCN: buffer_store_dword v0, off, s[0:3], s32{{$}}
153 declare void @extern_func(<32 x i32>, i32) #0
154 define void @func_call_align1024_bp_gets_vgpr_spill(<32 x i32> %a, i32 %b) #0 {
161 ; GCN: s_mov_b32 [[FP_SCRATCH_COPY:s[0-9]+]], s33
162 ; GCN-NEXT: s_add_i32 [[SCRATCH_REG:s[0-9]+]], s32, 0xffc0
163 ; GCN-NEXT: s_and_b32 s33, [[SCRATCH_REG]], 0xffff0000
165 ; GCN-NEXT: buffer_store_dword [[VGPR_REG:v[0-9]+]], off, s[0:3], s33 offset:1028 ; 4-byte Folded Spill
168 ; GCN-NEXT: v_mov_b32_e32 v32, 0
171 ; GCN: buffer_store_dword v32, off, s[0:3], s33 offset:1024
172 ; GCN-NEXT: s_waitcnt vmcnt(0)
173 ; GCN-NEXT: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s34
174 ; GCN-DAG: s_add_i32 s32, s32, 0x30000
175 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s32
179 ; GCN: v_readlane_b32 s30, [[VGPR_REG]], 0
181 ; GCN-NEXT: v_readlane_b32 [[FP_SCRATCH_COPY:s[0-9]+]], [[VGPR_REG]], 2
184 ; GCN-NEXT: buffer_load_dword [[VGPR_REG]], off, s[0:3], s33 offset:1028 ; 4-byte Folded Reload
189 store volatile i32 0, ptr addrspace(5) %temp, align 1024
203 ; GCN: s_mov_b32 [[FP_COPY:s[0-9]+]], s33
204 ; GCN-NEXT: s_add_i32 s33, s32, 0xffc0
205 ; GCN-NEXT: s_mov_b32 [[BP_COPY:s[0-9]+]], s34
207 ; GCN-NEXT: s_and_b32 s33, s33, 0xffff0000
208 ; GCN-NEXT: v_lshrrev_b32_e64 [[VGPR_REG:v[0-9]+]], 6, s34
209 ; GCN-NEXT: v_mov_b32_e32 v{{[0-9]+}}, 0
210 ; GCN: s_add_i32 s32, s32, 0x30000
211 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s33 offset:1024
212 ; GCN: buffer_load_dword v{{[0-9]+}}, [[VGPR_REG]], s[0:3], 0 offen
220 store volatile i32 0, ptr addrspace(5) %local_var, align 1024
229 %lp_idx = phi i32 [ 0, %begin ], [ %idx_next, %loop_end ]
230 %ptr = getelementptr inbounds %struct.Data, ptr addrspace(5) %arg, i32 0, i32 0, i32 %lp_idx
236 %out = phi i32 [ 0, %loop_body ], [ 1, %loop_end ]
240 define void @no_free_scratch_sgpr_for_bp_copy(<32 x i32> %a, i32 %b) #0 {
242 ; GCN: ; %bb.0:
243 ; GCN: v_writelane_b32 [[VGPR_REG:v[0-9]+]], s34, 0
245 ; GCN-NEXT: buffer_load_dword v{{[0-9]+}}, off, s[0:3], s34
246 ; GCN: v_readlane_b32 s34, [[VGPR_REG:v[0-9]+]], 0
247 ; GCN: buffer_store_dword v{{[0-9]+}}, off, s[0:3], s33 offset:128
248 ; GCN-NEXT: s_waitcnt vmcnt(0)
259 ,~{vcc_hi}"() #0
267 ; GCN: s_mov_b32 [[FP_SCRATCH_COPY:s[0-9]+]], s33
269 ; GCN: buffer_store_dword v39, off, s[0:3], s33
271 ; GCN: buffer_store_dword v0, off, s[0:3], s33
273 ; GCN-DAG: buffer_store_dword v0, off, s[0:3], s33
287 ,~{s100},~{s101},~{s102},~{s39},~{vcc}"() #0
293 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38}" () #0
302 ; GCN: s_mov_b32 [[FP_SCRATCH_COPY:s[0-9]+]], s33
303 ; GCN-NEXT: s_add_i32 s33, s32, 0x1fc0
304 ; GCN-NEXT: s_and_b32 s33, s33, 0xffffe000
306 ; GCN-NEXT: s_add_i32 s5, s33, 0x42100
307 ; GCN-NEXT: buffer_store_dword v39, off, s[0:3], s5 ; 4-byte Folded Spill
310 ; GCN-NEXT: s_add_i32 s5, s33, 0x42200
311 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s5 ; 4-byte Folded Spill
313 ; GCN-NEXT: s_add_i32 s5, s33, 0x42300
315 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s5 ; 4-byte Folded Spill
329 ,~{s100},~{s101},~{s102},~{s39},~{vcc}"() #0
335 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38}"() #0
339 attributes #0 = { noinline nounwind }