Lines Matching full:select
9 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
10 ; GCN: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]
18 %select = select i1 %cmp, float %fabs.x, float %fabs.y
19 %add = fadd float %select, %z
30 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
31 ; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]
41 %select = select i1 %cmp, float %fabs.x, float %fabs.y
42 %add0 = fadd float %select, %z
54 ; GCN-DAG: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
55 ; GCN-DAG: v_add_f32_e64 [[ADD:v[0-9]+]], |[[SELECT]]|, [[Z]]
67 %select = select i1 %cmp, float %fabs.x, float %fabs.y
68 %add0 = fadd float %select, %z
80 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
81 ; GCN-DAG: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[Z]]
91 %select = select i1 %cmp, float %fabs.x, float %fabs.y
92 %add0 = fadd float %select, %z
104 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[Y]], |[[X]]|,
105 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
112 %select = select i1 %cmp, float %fabs.x, float %y
113 %add = fadd float %select, %z
122 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, |[[X]]|,
123 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
129 %select = select i1 %cmp, float %fabs, float -1.0
130 %add = fadd float %select, %y
139 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, -2.0, s
140 ; GCN: v_add_f32_e64 v{{[0-9]+}}, |[[SELECT]]|, [[X]]
144 %select = select i1 %cmp, float -2.0, float -1.0
145 %fabs = call float @llvm.fabs.f32(float %select)
154 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, 2.0, s
155 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]
159 %select = select i1 %cmp, float 2.0, float 1.0
160 %add = fadd float %select, %x
171 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, |[[X]]|, [[VCC]]
172 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
178 %select = select i1 %cmp, float -1.0, float %fabs
179 %add = fadd float %select, %y
191 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], |[[X]]|, [[VCC]]
192 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
198 %select = select i1 %cmp, float -1024.0, float %fabs
199 %add = fadd float %select, %y
208 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, |[[X]]|, s{{\[[0-9]+:[0-9]+\]}}
209 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
216 %select = select i1 %cmp, float %fabs, float 1.0
217 %add = fadd float %select, %y
228 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, |[[X]]|, s{{\[[0-9]+:[0-9]+\]}}
229 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
235 %select = select i1 %cmp, float 1.0, float %fabs
236 %add = fadd float %select, %y
246 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
247 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]
255 %select = select i1 %cmp, float %fneg.x, float %fneg.y
256 %add = fadd float %select, %z
267 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
268 ; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]
278 %select = select i1 %cmp, float %fneg.x, float %fneg.y
279 %add0 = fadd float %select, %z
292 ; GCN-DAG: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
293 ; GCN-DAG: v_sub_f32_e32 [[ADD:v[0-9]+]], [[Z]], [[SELECT]]
304 %select = select i1 %cmp, float %fneg.x, float %fneg.y
305 %add0 = fadd float %select, %z
317 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[Y]], [[X]], vcc
318 ; GCN-DAG: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]
328 %select = select i1 %cmp, float %fneg.x, float %fneg.y
329 %add0 = fadd float %select, %z
341 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[Y]], -[[X]],
342 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
349 %select = select i1 %cmp, float %fneg.x, float %y
350 %add = fadd float %select, %z
359 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 1.0, [[X]], vcc
360 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
366 %select = select i1 %cmp, float %fneg.x, float -1.0
367 %add = fadd float %select, %y
377 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K]], [[X]], vcc
378 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
384 %select = select i1 %cmp, float %fneg.x, float 0x3FC45F3060000000
385 %add = fadd float %select, %y
395 ; SI: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K]], [[X]], vcc
396 ; VI: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 0.15915494, [[X]], vcc
398 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
404 %select = select i1 %cmp, float %fneg.x, float 0xBFC45F3060000000
405 %add = fadd float %select, %y
414 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -1.0, -2.0, s
415 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]
419 %select = select i1 %cmp, float -2.0, float -1.0
420 %add = fadd float %select, %x
431 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], [[K1]], [[K0]], vcc
432 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]
436 %select = select i1 %cmp, float -2048.0, float -4096.0
437 %add = fadd float %select, %x
445 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 1.0, 2.0, s
446 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[X]]
450 %select = select i1 %cmp, float -2.0, float -1.0
451 %fneg.x = fsub float -0.0, %select
463 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 1.0, [[X]], vcc
464 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
470 %select = select i1 %cmp, float -1.0, float %fneg.x
471 %add = fadd float %select, %y
480 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], -1.0, [[X]], vcc
481 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
487 %select = select i1 %cmp, float %fneg.x, float 1.0
488 %add = fadd float %select, %y
499 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], -1.0, [[X]], vcc
500 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Y]], [[SELECT]]
506 %select = select i1 %cmp, float 1.0, float %fneg.x
507 %add = fadd float %select, %y
517 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, -|[[X]]|,
518 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
527 %select = select i1 %cmp, float %fneg.fabs.x, float %fabs.y
528 %add = fadd float %select, %z
538 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -|[[Y]]|, |[[X]]|,
539 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
548 %select = select i1 %cmp, float %fabs.x, float %fneg.fabs.y
549 %add = fadd float %select, %z
559 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, -[[X]],
560 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
568 %select = select i1 %cmp, float %fneg.x, float %fabs.y
569 %add = fadd float %select, %z
579 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -[[Y]], |[[X]]|,
580 ; GCN: v_add_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Z]]
588 %select = select i1 %cmp, float %fabs.x, float %fneg.y
589 %add = fadd float %select, %z
599 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[Y]]|, [[X]],
600 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]
609 %select = select i1 %cmp, float %fneg.x, float %fneg.fabs.y
610 %add = fadd float %select, %z
620 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], |[[X]]|, [[Y]],
621 ; GCN: v_sub_f32_e32 v{{[0-9]+}}, [[Z]], [[SELECT]]
630 %select = select i1 %cmp, float %fneg.y, float %fneg.fabs.x
631 %add = fadd float %select, %z
642 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 4.0, -|[[X]]|, [[VCC]]
643 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
650 %select = select i1 %cmp, float %fneg.fabs.x, float 4.0
651 %add = fmul float %select, %y
662 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 4.0, -|[[X]]|, [[VCC]]
663 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
670 %select = select i1 %cmp, float 4.0, float %fneg.fabs.x
671 %add = fmul float %select, %y
680 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -4.0, -|[[X]]|, s{{\[[0-9]+:[0-9]+\]}}
681 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
688 %select = select i1 %cmp, float %fneg.fabs.x, float -4.0
689 %add = fmul float %select, %y
700 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], -4.0, -|[[X]]|, [[VCC]]
701 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
708 %select = select i1 %cmp, float -4.0, float %fneg.fabs.x
709 %add = fmul float %select, %y
723 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[ADD]], vcc
724 ; GCN-NEXT: buffer_store_dword [[SELECT]]
731 %select = select i1 %cmp, float %fneg, float 2.0
732 store volatile float %select, ptr addrspace(1) undef
740 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[ADD]], vcc
741 ; GCN-NEXT: buffer_store_dword [[SELECT]]
747 %select = select i1 %cmp, float %fneg, float 2.0
748 store volatile float %select, ptr addrspace(1) undef
756 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[MUL]], vcc
757 ; GCN-NEXT: buffer_store_dword [[SELECT]]
763 %select = select i1 %cmp, float %fneg, float 2.0
764 store volatile float %select, ptr addrspace(1) undef
773 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[FMA]], vcc
774 ; GCN-NEXT: buffer_store_dword [[SELECT]]
781 %select = select i1 %cmp, float %fneg, float 2.0
782 store volatile float %select, ptr addrspace(1) undef
790 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[X]], vcc
791 ; GCN-NEXT: buffer_store_dword [[SELECT]]
798 %select = select i1 %cmp, float %fneg, float 2.0
799 store volatile float %select, ptr addrspace(1) undef
808 ; GCN: v_cndmask_b32_e32 [[SELECT:v[0-9]+]], 2.0, [[RCP]], vcc
809 ; GCN-NEXT: buffer_store_dword [[SELECT]]
816 %select = select i1 %cmp, float %fneg, float 2.0
817 store volatile float %select, ptr addrspace(1) undef
829 ; SI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, [[VCC]]
830 ; SI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
832 ; VI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0.15915494, -|[[X]]|, [[VCC]]
833 ; VI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
840 %select = select i1 %cmp, float %fneg.fabs.x, float 0x3FC45F3060000000
841 %add = fmul float %select, %y
855 ; SI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, [[VCC]]
856 ; SI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
859 ; VI: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0.15915494, -|[[X]]|, [[VCC]]
860 ; VI: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
867 %select = select i1 %cmp, float 0x3FC45F3060000000, float %fneg.fabs.x
868 %add = fmul float %select, %y
877 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, s
878 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
885 %select = select i1 %cmp, float %fneg.fabs.x, float 0xBFC45F3060000000
886 %add = fmul float %select, %y
898 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[K]], -|[[X]]|, s[0:1]
899 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
906 %select = select i1 %cmp, float 0xBFC45F3060000000, float %fneg.fabs.x
907 %add = fmul float %select, %y
917 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0, -|[[X]]|, [[VCC]]
918 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
925 %select = select i1 %cmp, float %fneg.fabs.x, float 0.0
926 %add = fmul float %select, %y
938 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], 0, -|[[X]]|, [[VCC]]
939 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
946 %select = select i1 %cmp, float 0.0, float %fneg.fabs.x
947 %add = fmul float %select, %y
957 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[NEG0]], -|[[X]]|, s{{\[[0-9]+:[0-9]+\]}}
958 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
965 %select = select i1 %cmp, float %fneg.fabs.x, float -0.0
966 %add = fmul float %select, %y
978 ; GCN: v_cndmask_b32_e64 [[SELECT:v[0-9]+]], [[NEG0]], -|[[X]]|, s[0:1]
979 ; GCN: v_mul_f32_e32 v{{[0-9]+}}, [[SELECT]], [[Y]]
986 %select = select i1 %cmp, float -0.0, float %fneg.fabs.x
987 %add = fmul float %select, %y