Lines Matching full:s4

15 ; GFX678-NEXT:    s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
16 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
17 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
23 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
24 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
25 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
31 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
32 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
33 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
51 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
52 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
53 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
59 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
60 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
61 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
67 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
68 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
69 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
87 ; GFX6-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
88 ; GFX6-NEXT: s_and_b32 s4, 0x7f3ff, s4
91 ; GFX6-NEXT: v_mov_b32_e32 v0, s4
99 ; GFX7-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
100 ; GFX7-NEXT: s_and_b32 s4, 0x7f3ff, s4
103 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
162 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
163 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
164 ; GFX678-NEXT: s_and_b32 s4, s4, 0xf0
165 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
171 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
172 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
173 ; GFX9-NEXT: s_and_b32 s4, s4, 0xf0
174 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
180 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
181 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
182 ; GFX10-NEXT: s_and_b32 s4, s4, 0xf0
183 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
203 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
204 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
205 ; GFX678-NEXT: s_and_b32 s4, s4, 15
206 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
212 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
213 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
214 ; GFX9-NEXT: s_and_b32 s4, s4, 15
215 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
221 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
222 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
223 ; GFX10-NEXT: s_and_b32 s4, s4, 15
224 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
244 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
245 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
246 ; GFX678-NEXT: s_and_b32 s4, s4, 0xff
247 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
253 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
254 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
255 ; GFX9-NEXT: s_and_b32 s4, s4, 0xff
256 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
262 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
263 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
264 ; GFX10-NEXT: s_and_b32 s4, s4, 0xff
265 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
285 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
286 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
287 ; GFX678-NEXT: s_and_b32 s4, s4, 0x3ff
288 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
294 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
295 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
296 ; GFX9-NEXT: s_and_b32 s4, s4, 0x3ff
297 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
303 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
304 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
305 ; GFX10-NEXT: s_and_b32 s4, s4, 0x3ff
306 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
326 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
327 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
328 ; GFX678-NEXT: s_and_b32 s4, s4, 0x7f000
329 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
335 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
336 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
337 ; GFX9-NEXT: s_and_b32 s4, s4, 0x7f000
338 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
344 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
345 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
346 ; GFX10-NEXT: s_and_b32 s4, s4, 0x7f000
347 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
368 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
369 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
370 ; GFX678-NEXT: s_and_b32 s4, s4, 0x7f3ff
371 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
377 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
378 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
379 ; GFX9-NEXT: s_and_b32 s4, s4, 0x7f3ff
380 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
386 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
387 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
388 ; GFX10-NEXT: s_and_b32 s4, s4, 0x7f3ff
389 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
410 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
411 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
412 ; GFX678-NEXT: s_and_b32 s4, s4, 0x87f3ff
413 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
419 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
420 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
421 ; GFX9-NEXT: s_and_b32 s4, s4, 0x87f3ff
422 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
428 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
429 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
430 ; GFX10-NEXT: s_and_b32 s4, s4, 0x87f3ff
431 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
451 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
452 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
453 ; GFX678-NEXT: s_and_b32 s4, s4, 48
454 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
460 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
461 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
462 ; GFX9-NEXT: s_and_b32 s4, s4, 48
463 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
469 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
470 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
471 ; GFX10-NEXT: s_and_b32 s4, s4, 48
472 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
492 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
493 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
494 ; GFX678-NEXT: s_and_b32 s4, s4, 32
495 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
501 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
502 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
503 ; GFX9-NEXT: s_and_b32 s4, s4, 32
504 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
510 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
511 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
512 ; GFX10-NEXT: s_and_b32 s4, s4, 32
513 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
533 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
534 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
535 ; GFX678-NEXT: s_and_b32 s4, s4, 64
536 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
542 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
543 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
544 ; GFX9-NEXT: s_and_b32 s4, s4, 64
545 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
551 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
552 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
553 ; GFX10-NEXT: s_and_b32 s4, s4, 64
554 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
574 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
575 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
576 ; GFX678-NEXT: s_and_b32 s4, s4, 0xc0
577 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
583 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
584 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
585 ; GFX9-NEXT: s_and_b32 s4, s4, 0xc0
586 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
592 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
593 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
594 ; GFX10-NEXT: s_and_b32 s4, s4, 0xc0
595 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
615 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
616 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
617 ; GFX678-NEXT: s_and_b32 s4, s4, 0x100
618 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
624 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
625 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
626 ; GFX9-NEXT: s_and_b32 s4, s4, 0x100
627 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
633 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
634 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
635 ; GFX10-NEXT: s_and_b32 s4, s4, 0x100
636 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
656 ; GFX678-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 19)
657 ; GFX678-NEXT: s_and_b32 s4, 0x7f3ff, s4
658 ; GFX678-NEXT: s_and_b32 s4, s4, 0x200
659 ; GFX678-NEXT: v_mov_b32_e32 v0, s4
665 ; GFX9-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
666 ; GFX9-NEXT: s_and_b32 s4, 0x87f3ff, s4
667 ; GFX9-NEXT: s_and_b32 s4, s4, 0x200
668 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
674 ; GFX10-NEXT: s_getreg_b32 s4, hwreg(HW_REG_MODE, 0, 24)
675 ; GFX10-NEXT: s_and_b32 s4, 0x87f3ff, s4
676 ; GFX10-NEXT: s_and_b32 s4, s4, 0x200
677 ; GFX10-NEXT: v_mov_b32_e32 v0, s4