Lines Matching +full:2 +full:d
5 define <vscale x 2 x i64> @xar_nxv2i64_l(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
8 ; SVE-NEXT: eor z0.d, z0.d, z1.d
9 ; SVE-NEXT: lsr z1.d, z0.d, #4
10 ; SVE-NEXT: lsl z0.d, z0.d, #60
11 ; SVE-NEXT: orr z0.d, z0.d, z1.d
16 ; SVE2-NEXT: xar z0.d, z0.d, z1.d, #4
18 %a = xor <vscale x 2 x i64> %x, %y
19 …%b = call <vscale x 2 x i64> @llvm.fshl.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %a, <vsc…
20 ret <vscale x 2 x i64> %b
23 define <vscale x 2 x i64> @xar_nxv2i64_r(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
26 ; SVE-NEXT: eor z0.d, z0.d, z1.d
27 ; SVE-NEXT: lsl z1.d, z0.d, #60
28 ; SVE-NEXT: lsr z0.d, z0.d, #4
29 ; SVE-NEXT: orr z0.d, z0.d, z1.d
34 ; SVE2-NEXT: xar z0.d, z0.d, z1.d, #4
36 %a = xor <vscale x 2 x i64> %x, %y
37 …%b = call <vscale x 2 x i64> @llvm.fshr.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %a, <vsc…
38 ret <vscale x 2 x i64> %b
45 ; SVE-NEXT: eor z0.d, z0.d, z1.d
48 ; SVE-NEXT: orr z0.d, z0.d, z1.d
63 ; SVE-NEXT: eor z0.d, z0.d, z1.d
66 ; SVE-NEXT: orr z0.d, z0.d, z1.d
81 ; SVE-NEXT: eor z0.d, z0.d, z1.d
84 ; SVE-NEXT: orr z0.d, z0.d, z1.d
99 ; SVE-NEXT: eor z0.d, z0.d, z1.d
102 ; SVE-NEXT: orr z0.d, z0.d, z1.d
117 ; SVE-NEXT: eor z0.d, z0.d, z1.d
120 ; SVE-NEXT: orr z0.d, z0.d, z1.d
135 ; SVE-NEXT: eor z0.d, z0.d, z1.d
138 ; SVE-NEXT: orr z0.d, z0.d, z1.d
151 define <vscale x 2 x i64> @xar_nxv2i64_l_neg1(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y, <vscale…
154 ; CHECK-NEXT: mov z3.d, z2.d
155 ; CHECK-NEXT: subr z2.d, z2.d, #0 // =0x0
156 ; CHECK-NEXT: eor z0.d, z0.d, z1.d
157 ; CHECK-NEXT: ptrue p0.d
158 ; CHECK-NEXT: and z3.d, z3.d, #0x3f
159 ; CHECK-NEXT: and z2.d, z2.d, #0x3f
161 ; CHECK-NEXT: lsl z1.d, p0/m, z1.d, z3.d
162 ; CHECK-NEXT: lsr z0.d, p0/m, z0.d, z2.d
163 ; CHECK-NEXT: orr z0.d, z1.d, z0.d
165 %a = xor <vscale x 2 x i64> %x, %y
166 …%b = call <vscale x 2 x i64> @llvm.fshl.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %a, <vsc…
167 ret <vscale x 2 x i64> %b
172 define <vscale x 2 x i64> @xar_nxv2i64_l_neg2(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
175 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
176 ; CHECK-NEXT: lsr z1.d, z0.d, #4
177 ; CHECK-NEXT: lsl z0.d, z0.d, #60
178 ; CHECK-NEXT: orr z0.d, z0.d, z1.d
180 %a = or <vscale x 2 x i64> %x, %y
181 …%b = call <vscale x 2 x i64> @llvm.fshl.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %a, <vsc…
182 ret <vscale x 2 x i64> %b
186 define <vscale x 2 x i64> @xar_nxv2i64_l_neg3(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
189 ; CHECK-NEXT: eor z0.d, z0.d, z1.d
191 %a = xor <vscale x 2 x i64> %x, %y
192 …%b = call <vscale x 2 x i64> @llvm.fshl.nxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %a, <vsc…
193 ret <vscale x 2 x i64> %b
197 define <vscale x 2 x i64> @xar_nxv2i64_shifts(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
200 ; SVE-NEXT: eor z0.d, z0.d, z1.d
201 ; SVE-NEXT: lsr z1.d, z0.d, #4
202 ; SVE-NEXT: lsl z0.d, z0.d, #60
203 ; SVE-NEXT: orr z0.d, z0.d, z1.d
208 ; SVE2-NEXT: xar z0.d, z0.d, z1.d, #4
210 %xor = xor <vscale x 2 x i64> %x, %y
211 %shl = shl <vscale x 2 x i64> %xor, splat (i64 60)
212 %shr = lshr <vscale x 2 x i64> %xor, splat (i64 4)
213 %or = or <vscale x 2 x i64> %shl, %shr
214 ret <vscale x 2 x i64> %or
218 define <vscale x 2 x i64> @xar_nxv2i64_shifts_neg(<vscale x 2 x i64> %x, <vscale x 2 x i64> %y) {
221 ; CHECK-NEXT: eor z0.d, z0.d, z1.d
222 ; CHECK-NEXT: lsl z1.d, z0.d, #60
223 ; CHECK-NEXT: lsr z0.d, z0.d, #3
224 ; CHECK-NEXT: orr z0.d, z1.d, z0.d
226 %xor = xor <vscale x 2 x i64> %x, %y
227 %shl = shl <vscale x 2 x i64> %xor, splat (i64 60)
228 %shr = lshr <vscale x 2 x i64> %xor, splat (i64 3)
229 %or = or <vscale x 2 x i64> %shl, %shr
230 ret <vscale x 2 x i64> %or
233 declare <vscale x 2 x i64> @llvm.fshl.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x…
237 declare <vscale x 2 x i64> @llvm.fshr.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x…