Lines Matching refs:slice
6 define void @test_fmla_f16_vg2_single(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b) #0 {
13 call void @llvm.aarch64.sme.fmla.single.vg1x2.nxv8f16(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b)
14 %slice.7 = add i32 %slice, 7
15 call void @llvm.aarch64.sme.fmla.single.vg1x2.nxv8f16(i32 %slice.7, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b)
19 define void @test_fmla_f16_vg4_single(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
27 call void @llvm.aarch64.sme.fmla.single.vg1x4.nxv8f16(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
29 %slice.7 = add i32 %slice, 7
30 call void @llvm.aarch64.sme.fmla.single.vg1x4.nxv8f16(i32 %slice.7, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
35 define void @test_fmls_f16_vg2_single(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b) #0 {
42 call void @llvm.aarch64.sme.fmls.single.vg1x2.nxv8f16(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b)
43 %slice.7 = add i32 %slice, 7
44 call void @llvm.aarch64.sme.fmls.single.vg1x2.nxv8f16(i32 %slice.7, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1, <vscale x 8 x half> %b)
48 define void @test_fmls_f16_vg4_single(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
56 call void @llvm.aarch64.sme.fmls.single.vg1x4.nxv8f16(i32 %slice, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
58 %slice.7 = add i32 %slice, 7
59 call void @llvm.aarch64.sme.fmls.single.vg1x4.nxv8f16(i32 %slice.7, <vscale x 8 x half> %a0, <vscale x 8 x half> %a1,
64 define void @test_fmla_f16_vg2_multi(i32 %slice,
73 call void @llvm.aarch64.sme.fmla.vg1x2.nxv8f16(i32 %slice,
76 %slice.7 = add i32 %slice, 7
77 call void @llvm.aarch64.sme.fmla.vg1x2.nxv8f16(i32 %slice.7,
83 define void @test_fmla_f16_vg4_multi(i32 %slice,
94 call void @llvm.aarch64.sme.fmla.vg1x4.nxv8f16(i32 %slice,
99 %slice.7 = add i32 %slice, 7
100 call void @llvm.aarch64.sme.fmla.vg1x4.nxv8f16(i32 %slice.7,
108 define void @test_fmls_f16_vg2_multi(i32 %slice,
117 call void @llvm.aarch64.sme.fmls.vg1x2.nxv8f16(i32 %slice,
120 %slice.7 = add i32 %slice, 7
121 call void @llvm.aarch64.sme.fmls.vg1x2.nxv8f16(i32 %slice.7,
127 define void @test_fmls_f16_vg4_multi(i32 %slice,
138 call void @llvm.aarch64.sme.fmls.vg1x4.nxv8f16(i32 %slice,
143 %slice.7 = add i32 %slice, 7
144 call void @llvm.aarch64.sme.fmls.vg1x4.nxv8f16(i32 %slice.7,
152 define void @test_fmla_f16_vg2_index(i32 %slice,
161 call void @llvm.aarch64.sme.fmla.lane.vg1x2.nxv8f16(i32 %slice,
164 %slice.7 = add i32 %slice, 7
165 call void @llvm.aarch64.sme.fmla.lane.vg1x2.nxv8f16(i32 %slice.7,
171 define void @test_fmla_f16_vg4_index(i32 %slice,
181 call void @llvm.aarch64.sme.fmla.lane.vg1x4.nxv8f16(i32 %slice,
185 %slice.7 = add i32 %slice, 7
186 call void @llvm.aarch64.sme.fmla.lane.vg1x4.nxv8f16(i32 %slice,
193 define void @test_fmls_f16_vg2_index(i32 %slice,
202 call void @llvm.aarch64.sme.fmls.lane.vg1x2.nxv8f16(i32 %slice,
205 %slice.7 = add i32 %slice, 7
206 call void @llvm.aarch64.sme.fmls.lane.vg1x2.nxv8f16(i32 %slice.7,
212 define void @test_fmls_f16_vg4_index(i32 %slice,
222 call void @llvm.aarch64.sme.fmls.lane.vg1x4.nxv8f16(i32 %slice,
226 %slice.7 = add i32 %slice, 7
227 call void @llvm.aarch64.sme.fmls.lane.vg1x4.nxv8f16(i32 %slice,
234 define void @test_fmla_bf16_vg2_single(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b) #0 {
241 call void @llvm.aarch64.sme.fmla.single.vg1x2.nxv8bf16(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b)
242 %slice.7 = add i32 %slice, 7
243 call void @llvm.aarch64.sme.fmla.single.vg1x2.nxv8bf16(i32 %slice.7, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b)
247 define void @test_fmla_bf16_vg4_single(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
255 call void @llvm.aarch64.sme.fmla.single.vg1x4.nxv8bf16(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
257 %slice.7 = add i32 %slice, 7
258 call void @llvm.aarch64.sme.fmla.single.vg1x4.nxv8bf16(i32 %slice.7, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
263 define void @test_fmls_bf16_vg2_single(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b) #0 {
270 call void @llvm.aarch64.sme.fmls.single.vg1x2.nxv8bf16(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b)
271 %slice.7 = add i32 %slice, 7
272 call void @llvm.aarch64.sme.fmls.single.vg1x2.nxv8bf16(i32 %slice.7, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1, <vscale x 8 x bfloat> %b)
276 define void @test_fmls_bf16_vg4_single(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
284 call void @llvm.aarch64.sme.fmls.single.vg1x4.nxv8bf16(i32 %slice, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
286 %slice.7 = add i32 %slice, 7
287 call void @llvm.aarch64.sme.fmls.single.vg1x4.nxv8bf16(i32 %slice.7, <vscale x 8 x bfloat> %a0, <vscale x 8 x bfloat> %a1,
292 define void @test_fmla_bf16_vg2_multi(i32 %slice,
301 call void @llvm.aarch64.sme.fmla.vg1x2.nxv8bf16(i32 %slice,
304 %slice.7 = add i32 %slice, 7
305 call void @llvm.aarch64.sme.fmla.vg1x2.nxv8bf16(i32 %slice.7,
311 define void @test_fmla_bf16_vg4_multi(i32 %slice,
322 call void @llvm.aarch64.sme.fmla.vg1x4.nxv8bf16(i32 %slice,
327 %slice.7 = add i32 %slice, 7
328 call void @llvm.aarch64.sme.fmla.vg1x4.nxv8bf16(i32 %slice.7,
336 define void @test_fmls_bf16_vg2_multi(i32 %slice,
345 call void @llvm.aarch64.sme.fmls.vg1x2.nxv8bf16(i32 %slice,
348 %slice.7 = add i32 %slice, 7
349 call void @llvm.aarch64.sme.fmls.vg1x2.nxv8bf16(i32 %slice.7,
355 define void @test_fmls_bf16_vg4_multi(i32 %slice,
366 call void @llvm.aarch64.sme.fmls.vg1x4.nxv8bf16(i32 %slice,
371 %slice.7 = add i32 %slice, 7
372 call void @llvm.aarch64.sme.fmls.vg1x4.nxv8bf16(i32 %slice.7,
380 define void @test_fmla_bf16_vg2_index(i32 %slice,
389 call void @llvm.aarch64.sme.fmla.lane.vg1x2.nxv8bf16(i32 %slice,
392 %slice.7 = add i32 %slice, 7
393 call void @llvm.aarch64.sme.fmla.lane.vg1x2.nxv8bf16(i32 %slice.7,
399 define void @test_fmla_bf16_vg4_index(i32 %slice,
409 call void @llvm.aarch64.sme.fmla.lane.vg1x4.nxv8bf16(i32 %slice,
413 %slice.7 = add i32 %slice, 7
414 call void @llvm.aarch64.sme.fmla.lane.vg1x4.nxv8bf16(i32 %slice,
421 define void @test_fmls_bf16_vg2_index(i32 %slice,
430 call void @llvm.aarch64.sme.fmls.lane.vg1x2.nxv8bf16(i32 %slice,
433 %slice.7 = add i32 %slice, 7
434 call void @llvm.aarch64.sme.fmls.lane.vg1x2.nxv8bf16(i32 %slice.7,
440 define void @test_fmls_bf16_vg4_index(i32 %slice,
450 call void @llvm.aarch64.sme.fmls.lane.vg1x4.nxv8bf16(i32 %slice,
454 %slice.7 = add i32 %slice, 7
455 call void @llvm.aarch64.sme.fmls.lane.vg1x4.nxv8bf16(i32 %slice,