Lines Matching +full:0 +full:x5
24 bb.0:
48 $x9 = SUBXri undef $x11, 5, 0 ; should not affect MCLOH formation
49 $x1 = ADDXri $x1, target-flags(aarch64-pageoff) @g0, 0
52 $x3 = ADDXri $x20, target-flags(aarch64-pageoff) @g0, 0
59 $x9 = ADDXri undef $x9, target-flags(aarch64-pageoff) @g0, 0
64 HINT 0, implicit def $x10 ; clobbers x10
65 $x10 = ADDXri $x10, target-flags(aarch64-pageoff) @g0, 0
71 HINT 0, implicit def $x10 ; clobbers x10
72 $x11 = ADDXri $x10, target-flags(aarch64-pageoff) @g0, 0
73 $x12 = ADDXri $x10, target-flags(aarch64-pageoff) @g0, 0
77 ; CHECK-NEXT: $x5 = ADRP target-flags(aarch64-page) @g2
78 ; CHECK-NEXT: $s6 = LDRSui $x5, target-flags(aarch64-pageoff) @g2
84 $x5 = ADRP target-flags(aarch64-page) @g2
85 $s6 = LDRSui $x5, target-flags(aarch64-pageoff) @g2
89 ; CHECK-NEXT: $x5 = ADRP target-flags(aarch64-page, aarch64-got) @g2
90 ; CHECK-NEXT: $x6 = LDRXui $x5, target-flags(aarch64-pageoff, aarch64-got) @g2
96 $x5 = ADRP target-flags(aarch64-page, aarch64-got) @g2
97 $x6 = LDRXui $x5, target-flags(aarch64-pageoff, aarch64-got) @g2
112 $x8 = ADDXri $x7, target-flags(aarch64-pageoff) @g3, 0
120 ; CHECK-NEXT: $x5 = ADRP target-flags(aarch64-page) @g3
121 ; CHECK-NEXT: $x2 = ADDXri $x5, target-flags(aarch64-pageoff) @g3
127 $x1 = ADDXri $x1, target-flags(aarch64-pageoff) @g3, 0
131 $x5 = ADRP target-flags(aarch64-page) @g3
132 $x2 = ADDXri $x5, target-flags(aarch64-pageoff) @g3, 0
137 $x3 = ADDXri $x3, target-flags(aarch64-pageoff) @g3, 0
158 ; CHECK-NEXT: $x5 = ADRP target-flags(aarch64-page) @g1
159 ; CHECK-NEXT: $x5 = LDRXui $x5, target-flags(aarch64-pageoff) @g1
168 $x5 = ADRP target-flags(aarch64-page) @g1
169 $x5 = LDRXui $x5, target-flags(aarch64-pageoff) @g1
170 STRXui undef $x11, $x5, 32
177 ; $x5 = LDRXui $x9, 0
179 $x9 = ADDXri $x9, target-flags(aarch64-pageoff, aarch64-got) @g4, 0
180 $x5 = LDRXui $x9, 0
187 $x11 = ADDXri $x10, target-flags(aarch64-pageoff) @g0, 0
192 $x12 = ADDXri $x10, target-flags(aarch64-pageoff) @g0, 0