Lines Matching +full:0 +full:x8

10 define i32 @ldp_aligned_int32_t(ptr %0) #0 {
12 ; CHECK:       // %bb.0:
13 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffffc0
14 ; CHECK-NEXT:    ldp w9, w8, [x8]
19 ; CHECK-DEFAULT:       // %bb.0:
20 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffffc0
21 ; CHECK-DEFAULT-NEXT:    ldp w9, w8, [x8]
26 ; CHECK-DISABLE-LDP:       // %bb.0:
27 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffffc0
28 ; CHECK-DISABLE-LDP-NEXT:    ldr w9, [x8]
29 ; CHECK-DISABLE-LDP-NEXT:    ldr w8, [x8, #4]
32   %2 = ptrtoint ptr %0 to i64
42 define i64 @ldp_aligned_int64_t(ptr %0) #0 {
44 ; CHECK:       // %bb.0:
45 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff80
46 ; CHECK-NEXT:    ldp x9, x8, [x8]
47 ; CHECK-NEXT:    add x0, x8, x9
51 ; CHECK-DEFAULT:       // %bb.0:
52 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff80
53 ; CHECK-DEFAULT-NEXT:    ldp x9, x8, [x8]
54 ; CHECK-DEFAULT-NEXT:    add x0, x8, x9
58 ; CHECK-DISABLE-LDP:       // %bb.0:
59 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffff80
60 ; CHECK-DISABLE-LDP-NEXT:    ldr x9, [x8]
61 ; CHECK-DISABLE-LDP-NEXT:    ldr x8, [x8, #8]
62 ; CHECK-DISABLE-LDP-NEXT:    add x0, x8, x9
64   %2 = ptrtoint ptr %0 to i64
74 define <4 x i32> @ldp_aligned_v4si(ptr %0) #0 {
76 ; CHECK:       // %bb.0:
77 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff00
78 ; CHECK-NEXT:    ldp q0, q1, [x8]
83 ; CHECK-DEFAULT:       // %bb.0:
84 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff00
85 ; CHECK-DEFAULT-NEXT:    ldp q0, q1, [x8]
90 ; CHECK-DISABLE-LDP:       // %bb.0:
91 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffff00
92 ; CHECK-DISABLE-LDP-NEXT:    ldr q0, [x8]
93 ; CHECK-DISABLE-LDP-NEXT:    ldr q1, [x8, #16]
96   %2 = ptrtoint ptr %0 to i64
106 define i32 @ldp_unaligned_int32_t(ptr %0) #0 {
108 ; CHECK:       // %bb.0:
109 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffffc0
110 ; CHECK-NEXT:    ldr w9, [x8, #4]
111 ; CHECK-NEXT:    ldr w8, [x8, #8]
116 ; CHECK-DEFAULT:       // %bb.0:
117 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffffc0
118 ; CHECK-DEFAULT-NEXT:    ldp w9, w8, [x8, #4]
123 ; CHECK-DISABLE-LDP:       // %bb.0:
124 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffffc0
125 ; CHECK-DISABLE-LDP-NEXT:    ldr w9, [x8, #4]
126 ; CHECK-DISABLE-LDP-NEXT:    ldr w8, [x8, #8]
129   %2 = ptrtoint ptr %0 to i64
140 define i64 @ldp_unaligned_int64_t(ptr %0) #0 {
142 ; CHECK:       // %bb.0:
143 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff80
144 ; CHECK-NEXT:    ldr x9, [x8, #8]
145 ; CHECK-NEXT:    ldr x8, [x8, #16]
146 ; CHECK-NEXT:    add x0, x8, x9
150 ; CHECK-DEFAULT:       // %bb.0:
151 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff80
152 ; CHECK-DEFAULT-NEXT:    ldp x9, x8, [x8, #8]
153 ; CHECK-DEFAULT-NEXT:    add x0, x8, x9
157 ; CHECK-DISABLE-LDP:       // %bb.0:
158 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffff80
159 ; CHECK-DISABLE-LDP-NEXT:    ldr x9, [x8, #8]
160 ; CHECK-DISABLE-LDP-NEXT:    ldr x8, [x8, #16]
161 ; CHECK-DISABLE-LDP-NEXT:    add x0, x8, x9
163   %2 = ptrtoint ptr %0 to i64
174 define <4 x i32> @ldp_unaligned_v4si(ptr %0) #0 {
176 ; CHECK:       // %bb.0:
177 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff00
178 ; CHECK-NEXT:    ldr q0, [x8, #16]
179 ; CHECK-NEXT:    ldr q1, [x8, #32]
184 ; CHECK-DEFAULT:       // %bb.0:
185 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff00
186 ; CHECK-DEFAULT-NEXT:    ldp q0, q1, [x8, #16]
191 ; CHECK-DISABLE-LDP:       // %bb.0:
192 ; CHECK-DISABLE-LDP-NEXT:    and x8, x0, #0xffffffffffffff00
193 ; CHECK-DISABLE-LDP-NEXT:    ldr q0, [x8, #16]
194 ; CHECK-DISABLE-LDP-NEXT:    ldr q1, [x8, #32]
197   %2 = ptrtoint ptr %0 to i64
208 define ptr @stp_aligned_int32_t(ptr %0, i32 %1) #0 {
210 ; CHECK:       // %bb.0:
211 ; CHECK-NEXT:    and x0, x0, #0xffffffffffffffc0
216 ; CHECK-DEFAULT:       // %bb.0:
217 ; CHECK-DEFAULT-NEXT:    and x0, x0, #0xffffffffffffffc0
222 ; CHECK-DISABLE-STP:       // %bb.0:
223 ; CHECK-DISABLE-STP-NEXT:    and x0, x0, #0xffffffffffffffc0
227   %3 = ptrtoint ptr %0 to i64
236 define dso_local ptr @stp_aligned_int64_t(ptr %0, i64 %1) #0 {
238 ; CHECK:       // %bb.0:
239 ; CHECK-NEXT:    and x0, x0, #0xffffffffffffff80
244 ; CHECK-DEFAULT:       // %bb.0:
245 ; CHECK-DEFAULT-NEXT:    and x0, x0, #0xffffffffffffff80
250 ; CHECK-DISABLE-STP:       // %bb.0:
251 ; CHECK-DISABLE-STP-NEXT:    and x0, x0, #0xffffffffffffff80
255   %3 = ptrtoint ptr %0 to i64
264 define ptr @stp_aligned_v4si(ptr %0, <4 x i32> %1) #0 {
266 ; CHECK:       // %bb.0:
267 ; CHECK-NEXT:    and x0, x0, #0xffffffffffffff00
272 ; CHECK-DEFAULT:       // %bb.0:
273 ; CHECK-DEFAULT-NEXT:    and x0, x0, #0xffffffffffffff00
278 ; CHECK-DISABLE-STP:       // %bb.0:
279 ; CHECK-DISABLE-STP-NEXT:    and x0, x0, #0xffffffffffffff00
283   %3 = ptrtoint ptr %0 to i64
292 define ptr @stp_unaligned_int32_t(ptr %0, i32 %1) #0 {
294 ; CHECK:       // %bb.0:
295 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffffc0
296 ; CHECK-NEXT:    orr x0, x8, #0x4
297 ; CHECK-NEXT:    str w1, [x8, #4]
298 ; CHECK-NEXT:    str w1, [x8, #8]
302 ; CHECK-DEFAULT:       // %bb.0:
303 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffffc0
304 ; CHECK-DEFAULT-NEXT:    orr x0, x8, #0x4
305 ; CHECK-DEFAULT-NEXT:    stp w1, w1, [x8, #4]
309 ; CHECK-DISABLE-STP:       // %bb.0:
310 ; CHECK-DISABLE-STP-NEXT:    and x8, x0, #0xffffffffffffffc0
311 ; CHECK-DISABLE-STP-NEXT:    orr x0, x8, #0x4
312 ; CHECK-DISABLE-STP-NEXT:    str w1, [x8, #4]
313 ; CHECK-DISABLE-STP-NEXT:    str w1, [x8, #8]
315   %3 = ptrtoint ptr %0 to i64
325 define ptr @stp_unaligned_int64_t(ptr %0, i64 %1) #0 {
327 ; CHECK:       // %bb.0:
328 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff80
329 ; CHECK-NEXT:    orr x0, x8, #0x8
330 ; CHECK-NEXT:    str x1, [x8, #8]
331 ; CHECK-NEXT:    str x1, [x8, #16]
335 ; CHECK-DEFAULT:       // %bb.0:
336 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff80
337 ; CHECK-DEFAULT-NEXT:    orr x0, x8, #0x8
338 ; CHECK-DEFAULT-NEXT:    stp x1, x1, [x8, #8]
342 ; CHECK-DISABLE-STP:       // %bb.0:
343 ; CHECK-DISABLE-STP-NEXT:    and x8, x0, #0xffffffffffffff80
344 ; CHECK-DISABLE-STP-NEXT:    orr x0, x8, #0x8
345 ; CHECK-DISABLE-STP-NEXT:    str x1, [x8, #8]
346 ; CHECK-DISABLE-STP-NEXT:    str x1, [x8, #16]
348   %3 = ptrtoint ptr %0 to i64
358 define ptr @stp_unaligned_v4si(ptr %0, <4 x i32> %1) #0 {
360 ; CHECK:       // %bb.0:
361 ; CHECK-NEXT:    and x8, x0, #0xffffffffffffff00
362 ; CHECK-NEXT:    orr x0, x8, #0x10
363 ; CHECK-NEXT:    str q0, [x8, #16]
364 ; CHECK-NEXT:    str q0, [x8, #32]
368 ; CHECK-DEFAULT:       // %bb.0:
369 ; CHECK-DEFAULT-NEXT:    and x8, x0, #0xffffffffffffff00
370 ; CHECK-DEFAULT-NEXT:    orr x0, x8, #0x10
371 ; CHECK-DEFAULT-NEXT:    stp q0, q0, [x8, #16]
375 ; CHECK-DISABLE-STP:       // %bb.0:
376 ; CHECK-DISABLE-STP-NEXT:    and x8, x0, #0xffffffffffffff00
377 ; CHECK-DISABLE-STP-NEXT:    orr x0, x8, #0x10
378 ; CHECK-DISABLE-STP-NEXT:    str q0, [x8, #16]
379 ; CHECK-DISABLE-STP-NEXT:    str q0, [x8, #32]
381   %3 = ptrtoint ptr %0 to i64