Lines Matching +full:- +full:d
2 ; RUN: llc < %s --mattr=+sve -o - | FileCheck %s
4 target triple = "aarch64-unknown-linux-gnu"
8 ; CHECK-LABEL: mull_add:
10 ; CHECK-NEXT: uzp2 z6.d, z0.d, z1.d
11 ; CHECK-NEXT: uzp1 z0.d, z0.d, z1.d
12 ; CHECK-NEXT: uzp2 z1.d, z2.d, z3.d
13 ; CHECK-NEXT: uzp1 z2.d, z2.d, z3.d
14 ; CHECK-NEXT: ptrue p0.d
15 ; CHECK-NEXT: fmul z7.d, z0.d, z1.d
16 ; CHECK-NEXT: fmul z1.d, z6.d, z1.d
17 ; CHECK-NEXT: movprfx z3, z7
18 ; CHECK-NEXT: fmla z3.d, p0/m, z6.d, z2.d
19 ; CHECK-NEXT: fnmsb z0.d, p0/m, z2.d, z1.d
20 ; CHECK-NEXT: uzp2 z1.d, z4.d, z5.d
21 ; CHECK-NEXT: uzp1 z2.d, z4.d, z5.d
22 ; CHECK-NEXT: fadd z2.d, z2.d, z0.d
23 ; CHECK-NEXT: fadd z1.d, z3.d, z1.d
24 ; CHECK-NEXT: zip1 z0.d, z2.d, z1.d
25 ; CHECK-NEXT: zip2 z1.d, z2.d, z1.d
26 ; CHECK-NEXT: ret
49 ; a * b + c * d
50 …e x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
51 ; CHECK-LABEL: mul_add_mull:
53 ; CHECK-NEXT: mov z24.d, #0 // =0x0
54 ; CHECK-NEXT: ptrue p0.d
55 ; CHECK-NEXT: mov z25.d, z24.d
56 ; CHECK-NEXT: mov z26.d, z24.d
57 ; CHECK-NEXT: mov z27.d, z24.d
58 ; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #0
59 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #0
60 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #0
61 ; CHECK-NEXT: fcmla z27.d, p0/m, z6.d, z4.d, #0
62 ; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #90
63 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #90
64 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #90
65 ; CHECK-NEXT: fcmla z27.d, p0/m, z6.d, z4.d, #90
66 ; CHECK-NEXT: fadd z1.d, z26.d, z24.d
67 ; CHECK-NEXT: fadd z0.d, z25.d, z27.d
68 ; CHECK-NEXT: ret
85 …x 2 x double>, <vscale x 2 x double> } @llvm.vector.deinterleave2.nxv4f64(<vscale x 4 x double> %d)
100 ; a * b - c * d
101 …e x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
102 ; CHECK-LABEL: mul_sub_mull:
104 ; CHECK-NEXT: mov z24.d, #0 // =0x0
105 ; CHECK-NEXT: ptrue p0.d
106 ; CHECK-NEXT: mov z25.d, z24.d
107 ; CHECK-NEXT: mov z26.d, z24.d
108 ; CHECK-NEXT: mov z27.d, z24.d
109 ; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #0
110 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #0
111 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #0
112 ; CHECK-NEXT: fcmla z27.d, p0/m, z6.d, z4.d, #0
113 ; CHECK-NEXT: fcmla z24.d, p0/m, z7.d, z5.d, #90
114 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #90
115 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #90
116 ; CHECK-NEXT: fcmla z27.d, p0/m, z6.d, z4.d, #90
117 ; CHECK-NEXT: fsub z1.d, z26.d, z24.d
118 ; CHECK-NEXT: fsub z0.d, z25.d, z27.d
119 ; CHECK-NEXT: ret
136 …x 2 x double>, <vscale x 2 x double> } @llvm.vector.deinterleave2.nxv4f64(<vscale x 4 x double> %d)
151 ; a * b + conj(c) * d
152 …e x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
153 ; CHECK-LABEL: mul_conj_mull:
155 ; CHECK-NEXT: mov z24.d, #0 // =0x0
156 ; CHECK-NEXT: ptrue p0.d
157 ; CHECK-NEXT: mov z25.d, z24.d
158 ; CHECK-NEXT: mov z26.d, z24.d
159 ; CHECK-NEXT: mov z27.d, z24.d
160 ; CHECK-NEXT: fcmla z24.d, p0/m, z5.d, z7.d, #0
161 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #0
162 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #0
163 ; CHECK-NEXT: fcmla z27.d, p0/m, z4.d, z6.d, #0
164 ; CHECK-NEXT: fcmla z24.d, p0/m, z5.d, z7.d, #270
165 ; CHECK-NEXT: fcmla z25.d, p0/m, z2.d, z0.d, #90
166 ; CHECK-NEXT: fcmla z26.d, p0/m, z3.d, z1.d, #90
167 ; CHECK-NEXT: fcmla z27.d, p0/m, z4.d, z6.d, #270
168 ; CHECK-NEXT: fadd z1.d, z26.d, z24.d
169 ; CHECK-NEXT: fadd z0.d, z25.d, z27.d
170 ; CHECK-NEXT: ret
187 …x 2 x double>, <vscale x 2 x double> } @llvm.vector.deinterleave2.nxv4f64(<vscale x 4 x double> %d)
202 ; a + b + 1i * c * d
203 …e x 4 x double> %a, <vscale x 4 x double> %b, <vscale x 4 x double> %c, <vscale x 4 x double> %d) {
204 ; CHECK-LABEL: mul_add_rot_mull:
206 ; CHECK-NEXT: uzp2 z24.d, z4.d, z5.d
207 ; CHECK-NEXT: mov z25.d, #0 // =0x0
208 ; CHECK-NEXT: uzp1 z4.d, z4.d, z5.d
209 ; CHECK-NEXT: ptrue p0.d
210 ; CHECK-NEXT: mov z26.d, z24.d
211 ; CHECK-NEXT: and z25.d, z25.d, #0x7fffffffffffffff
212 ; CHECK-NEXT: and z26.d, z26.d, #0x8000000000000000
213 ; CHECK-NEXT: orr z5.d, z25.d, z26.d
214 ; CHECK-NEXT: fadd z5.d, z4.d, z5.d
215 ; CHECK-NEXT: and z4.d, z4.d, #0x8000000000000000
216 ; CHECK-NEXT: orr z4.d, z25.d, z4.d
217 ; CHECK-NEXT: uzp2 z25.d, z0.d, z1.d
218 ; CHECK-NEXT: uzp1 z0.d, z0.d, z1.d
219 ; CHECK-NEXT: uzp2 z1.d, z2.d, z3.d
220 ; CHECK-NEXT: uzp1 z2.d, z2.d, z3.d
221 ; CHECK-NEXT: fsub z4.d, z4.d, z24.d
222 ; CHECK-NEXT: uzp2 z24.d, z6.d, z7.d
223 ; CHECK-NEXT: uzp1 z6.d, z6.d, z7.d
224 ; CHECK-NEXT: fmul z26.d, z0.d, z1.d
225 ; CHECK-NEXT: fmul z1.d, z25.d, z1.d
226 ; CHECK-NEXT: fmul z3.d, z4.d, z24.d
227 ; CHECK-NEXT: fmul z24.d, z5.d, z24.d
228 ; CHECK-NEXT: movprfx z7, z26
229 ; CHECK-NEXT: fmla z7.d, p0/m, z25.d, z2.d
230 ; CHECK-NEXT: fnmsb z0.d, p0/m, z2.d, z1.d
231 ; CHECK-NEXT: movprfx z1, z3
232 ; CHECK-NEXT: fmla z1.d, p0/m, z6.d, z5.d
233 ; CHECK-NEXT: movprfx z2, z24
234 ; CHECK-NEXT: fnmls z2.d, p0/m, z4.d, z6.d
235 ; CHECK-NEXT: fadd z2.d, z0.d, z2.d
236 ; CHECK-NEXT: fadd z1.d, z7.d, z1.d
237 ; CHECK-NEXT: zip1 z0.d, z2.d, z1.d
238 ; CHECK-NEXT: zip2 z1.d, z2.d, z1.d
239 ; CHECK-NEXT: ret
260 …x 2 x double>, <vscale x 2 x double> } @llvm.vector.deinterleave2.nxv4f64(<vscale x 4 x double> %d)