Lines Matching full:mul

7 declare i8 @llvm.vector.reduce.mul.v2i8(<2 x i8>)
8 declare i8 @llvm.vector.reduce.mul.v3i8(<3 x i8>)
9 declare i8 @llvm.vector.reduce.mul.v4i8(<4 x i8>)
10 declare i8 @llvm.vector.reduce.mul.v8i8(<8 x i8>)
11 declare i8 @llvm.vector.reduce.mul.v16i8(<16 x i8>)
12 declare i8 @llvm.vector.reduce.mul.v32i8(<32 x i8>)
13 declare i16 @llvm.vector.reduce.mul.v2i16(<2 x i16>)
14 declare i16 @llvm.vector.reduce.mul.v3i16(<3 x i16>)
15 declare i16 @llvm.vector.reduce.mul.v4i16(<4 x i16>)
16 declare i16 @llvm.vector.reduce.mul.v8i16(<8 x i16>)
17 declare i16 @llvm.vector.reduce.mul.v16i16(<16 x i16>)
18 declare i32 @llvm.vector.reduce.mul.v2i32(<2 x i32>)
19 declare i32 @llvm.vector.reduce.mul.v3i32(<3 x i32>)
20 declare i32 @llvm.vector.reduce.mul.v4i32(<4 x i32>)
21 declare i32 @llvm.vector.reduce.mul.v8i32(<8 x i32>)
22 declare i64 @llvm.vector.reduce.mul.v2i64(<2 x i64>)
23 declare i64 @llvm.vector.reduce.mul.v3i64(<3 x i64>)
24 declare i64 @llvm.vector.reduce.mul.v4i64(<4 x i64>)
25 declare i128 @llvm.vector.reduce.mul.v2i128(<2 x i128>)
33 ; CHECK-NEXT:    mul w0, w9, w8
36   %arg1 = call i8 @llvm.vector.reduce.mul.v2i8(<2 x i8> %a)
43 ; CHECK-NEXT:    mul w8, w0, w1
44 ; CHECK-NEXT:    mul w0, w8, w2
47   %arg1 = call i8 @llvm.vector.reduce.mul.v3i8(<3 x i8> %a)
58 ; CHECK-SD-NEXT:    mul w8, w9, w8
60 ; CHECK-SD-NEXT:    mul w8, w8, w10
61 ; CHECK-SD-NEXT:    mul w0, w8, w9
71 ; CHECK-GI-NEXT:    mul w8, w8, w9
72 ; CHECK-GI-NEXT:    mul w9, w10, w11
73 ; CHECK-GI-NEXT:    mul w0, w8, w9
76   %arg1 = call i8 @llvm.vector.reduce.mul.v4i8(<4 x i8> %a)
87 ; CHECK-SD-NEXT:    mul w8, w9, w8
89 ; CHECK-SD-NEXT:    mul w8, w8, w10
91 ; CHECK-SD-NEXT:    mul w8, w8, w9
93 ; CHECK-SD-NEXT:    mul w8, w8, w10
95 ; CHECK-SD-NEXT:    mul w8, w8, w9
97 ; CHECK-SD-NEXT:    mul w8, w8, w10
98 ; CHECK-SD-NEXT:    mul w0, w8, w9
112 ; CHECK-GI-NEXT:    mul w8, w8, w9
113 ; CHECK-GI-NEXT:    mul w9, w10, w11
114 ; CHECK-GI-NEXT:    mul w10, w12, w13
115 ; CHECK-GI-NEXT:    mul w11, w14, w15
116 ; CHECK-GI-NEXT:    mul w8, w8, w9
117 ; CHECK-GI-NEXT:    mul w9, w10, w11
118 ; CHECK-GI-NEXT:    mul w0, w8, w9
121   %arg1 = call i8 @llvm.vector.reduce.mul.v8i8(<8 x i8> %a)
129 ; CHECK-SD-NEXT:    mul v0.8b, v0.8b, v1.8b
133 ; CHECK-SD-NEXT:    mul w8, w9, w8
135 ; CHECK-SD-NEXT:    mul w8, w8, w10
137 ; CHECK-SD-NEXT:    mul w8, w8, w9
139 ; CHECK-SD-NEXT:    mul w8, w8, w10
141 ; CHECK-SD-NEXT:    mul w8, w8, w9
143 ; CHECK-SD-NEXT:    mul w8, w8, w10
144 ; CHECK-SD-NEXT:    mul w0, w8, w9
150 ; CHECK-GI-NEXT:    mul v0.8b, v0.8b, v1.8b
159 ; CHECK-GI-NEXT:    mul w8, w8, w9
160 ; CHECK-GI-NEXT:    mul w9, w10, w11
161 ; CHECK-GI-NEXT:    mul w10, w12, w13
162 ; CHECK-GI-NEXT:    mul w11, w14, w15
163 ; CHECK-GI-NEXT:    mul w8, w8, w9
164 ; CHECK-GI-NEXT:    mul w9, w10, w11
165 ; CHECK-GI-NEXT:    mul w0, w8, w9
168   %arg1 = call i8 @llvm.vector.reduce.mul.v16i8(<16 x i8> %a)
175 ; CHECK-SD-NEXT:    mul v0.16b, v0.16b, v1.16b
177 ; CHECK-SD-NEXT:    mul v0.8b, v0.8b, v1.8b
181 ; CHECK-SD-NEXT:    mul w8, w9, w8
183 ; CHECK-SD-NEXT:    mul w8, w8, w10
185 ; CHECK-SD-NEXT:    mul w8, w8, w9
187 ; CHECK-SD-NEXT:    mul w8, w8, w10
189 ; CHECK-SD-NEXT:    mul w8, w8, w9
191 ; CHECK-SD-NEXT:    mul w8, w8, w10
192 ; CHECK-SD-NEXT:    mul w0, w8, w9
199 ; CHECK-GI-NEXT:    mul v0.8b, v0.8b, v2.8b
200 ; CHECK-GI-NEXT:    mul v1.8b, v1.8b, v3.8b
201 ; CHECK-GI-NEXT:    mul v0.8b, v0.8b, v1.8b
210 ; CHECK-GI-NEXT:    mul w8, w8, w9
211 ; CHECK-GI-NEXT:    mul w9, w10, w11
212 ; CHECK-GI-NEXT:    mul w10, w12, w13
213 ; CHECK-GI-NEXT:    mul w11, w14, w15
214 ; CHECK-GI-NEXT:    mul w8, w8, w9
215 ; CHECK-GI-NEXT:    mul w9, w10, w11
216 ; CHECK-GI-NEXT:    mul w0, w8, w9
219   %arg1 = call i8 @llvm.vector.reduce.mul.v32i8(<32 x i8> %a)
229 ; CHECK-NEXT:    mul w0, w9, w8
232   %arg1 = call i16 @llvm.vector.reduce.mul.v2i16(<2 x i16> %a)
243 ; CHECK-SD-NEXT:    mul w8, w9, w8
244 ; CHECK-SD-NEXT:    mul w0, w8, w10
253 ; CHECK-GI-NEXT:    mul w8, w8, w9
254 ; CHECK-GI-NEXT:    mul w0, w8, w10
257   %arg1 = call i16 @llvm.vector.reduce.mul.v3i16(<3 x i16> %a)
268 ; CHECK-SD-NEXT:    mul w8, w9, w8
270 ; CHECK-SD-NEXT:    mul w8, w8, w10
271 ; CHECK-SD-NEXT:    mul w0, w8, w9
281 ; CHECK-GI-NEXT:    mul w8, w8, w9
282 ; CHECK-GI-NEXT:    mul w9, w10, w11
283 ; CHECK-GI-NEXT:    mul w0, w8, w9
286   %arg1 = call i16 @llvm.vector.reduce.mul.v4i16(<4 x i16> %a)
294 ; CHECK-SD-NEXT:    mul v0.4h, v0.4h, v1.4h
298 ; CHECK-SD-NEXT:    mul w8, w9, w8
300 ; CHECK-SD-NEXT:    mul w8, w8, w10
301 ; CHECK-SD-NEXT:    mul w0, w8, w9
307 ; CHECK-GI-NEXT:    mul v0.4h, v0.4h, v1.4h
312 ; CHECK-GI-NEXT:    mul w8, w8, w9
313 ; CHECK-GI-NEXT:    mul w9, w10, w11
314 ; CHECK-GI-NEXT:    mul w0, w8, w9
317   %arg1 = call i16 @llvm.vector.reduce.mul.v8i16(<8 x i16> %a)
324 ; CHECK-SD-NEXT:    mul v0.8h, v0.8h, v1.8h
326 ; CHECK-SD-NEXT:    mul v0.4h, v0.4h, v1.4h
330 ; CHECK-SD-NEXT:    mul w8, w9, w8
332 ; CHECK-SD-NEXT:    mul w8, w8, w10
333 ; CHECK-SD-NEXT:    mul w0, w8, w9
340 ; CHECK-GI-NEXT:    mul v0.4h, v0.4h, v2.4h
341 ; CHECK-GI-NEXT:    mul v1.4h, v1.4h, v3.4h
342 ; CHECK-GI-NEXT:    mul v0.4h, v0.4h, v1.4h
347 ; CHECK-GI-NEXT:    mul w8, w8, w9
348 ; CHECK-GI-NEXT:    mul w9, w10, w11
349 ; CHECK-GI-NEXT:    mul w0, w8, w9
352   %arg1 = call i16 @llvm.vector.reduce.mul.v16i16(<16 x i16> %a)
362 ; CHECK-NEXT:    mul w0, w9, w8
365   %arg1 = call i32 @llvm.vector.reduce.mul.v2i32(<2 x i32> %a)
376 ; CHECK-NEXT:    mul v0.2s, v0.2s, v1.2s
379 ; CHECK-NEXT:    mul w0, w9, w8
382   %arg1 = call i32 @llvm.vector.reduce.mul.v3i32(<3 x i32> %a)
390 ; CHECK-SD-NEXT:    mul v0.2s, v0.2s, v1.2s
393 ; CHECK-SD-NEXT:    mul w0, w9, w8
399 ; CHECK-GI-NEXT:    mul v0.2s, v0.2s, v1.2s
402 ; CHECK-GI-NEXT:    mul w0, w9, w8
405   %arg1 = call i32 @llvm.vector.reduce.mul.v4i32(<4 x i32> %a)
412 ; CHECK-SD-NEXT:    mul v0.4s, v0.4s, v1.4s
414 ; CHECK-SD-NEXT:    mul v0.2s, v0.2s, v1.2s
417 ; CHECK-SD-NEXT:    mul w0, w9, w8
424 ; CHECK-GI-NEXT:    mul v0.2s, v0.2s, v2.2s
425 ; CHECK-GI-NEXT:    mul v1.2s, v1.2s, v3.2s
426 ; CHECK-GI-NEXT:    mul v0.2s, v0.2s, v1.2s
429 ; CHECK-GI-NEXT:    mul w0, w9, w8
432   %arg1 = call i32 @llvm.vector.reduce.mul.v8i32(<8 x i32> %a)
441 ; CHECK-NEXT:    mul x0, x9, x8
444   %arg1 = call i64 @llvm.vector.reduce.mul.v2i64(<2 x i64> %a)
456 ; CHECK-SD-NEXT:    mul x8, x9, x8
458 ; CHECK-SD-NEXT:    mul x0, x9, x8
465 ; CHECK-GI-NEXT:    mul x8, x8, x9
467 ; CHECK-GI-NEXT:    mul x0, x8, x9
470   %arg1 = call i64 @llvm.vector.reduce.mul.v3i64(<3 x i64> %a)
480 ; CHECK-SD-NEXT:    mul x8, x9, x8
482 ; CHECK-SD-NEXT:    mul x9, x10, x9
483 ; CHECK-SD-NEXT:    mul x0, x9, x8
491 ; CHECK-GI-NEXT:    mul x8, x10, x8
493 ; CHECK-GI-NEXT:    mul x9, x10, x9
494 ; CHECK-GI-NEXT:    mul x0, x8, x9
497   %arg1 = call i64 @llvm.vector.reduce.mul.v4i64(<4 x i64> %a)
506 ; CHECK-SD-NEXT:    mul x0, x0, x2
512 ; CHECK-GI-NEXT:    mul x9, x0, x3
513 ; CHECK-GI-NEXT:    mul x8, x0, x2
520   %arg1 = call i128 @llvm.vector.reduce.mul.v2i128(<2 x i128> %a)