Lines Matching defs:RegUses

437   // Update RegUses. The data structure is not optimized for this purpose;
532 const RegUseTracker &RegUses) const;
737 const RegUseTracker &RegUses) const {
739 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
742 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
1755 /// Recompute the Regs field, and update RegUses.
1756 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1768 RegUses.dropRegister(S, LUIdx);
2175 RegUseTracker RegUses;
2850 // Update RegUses.
2851 RegUses.swapAndDropUse(LUIdx, Uses.size());
3678 /// Note which registers are used by the given formula, updating RegUses.
3681 RegUses.countRegister(F.ScaledReg, LUIdx);
3683 RegUses.countRegister(BaseReg, LUIdx);
3707 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
4470 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
4518 for (const SCEV *Use : RegUses) {
4525 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
4553 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
4798 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
4802 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
4836 LU.RecomputeRegs(LUIdx, RegUses);
4929 LU.RecomputeRegs(LUIdx, RegUses);
4989 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
5059 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
5064 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
5107 LU.RecomputeRegs(LUIdx, RegUses);
5159 LU.RecomputeRegs(LUIdx, RegUses);
5224 for (const SCEV *Reg : RegUses) {
5292 LU.RecomputeRegs(LUIdx, RegUses);
5346 for (const SCEV *Reg : RegUses) {
5351 BestNum = RegUses.getUsedByIndices(Reg).count();
5353 unsigned Count = RegUses.getUsedByIndices(Reg).count();
5363 int LUIdx = RegUses.getUsedByIndices(Reg).find_first();
5400 LU.RecomputeRegs(LUIdx, RegUses);
6246 RegUses.clear();